Lines Matching refs:AArch64TargetLowering
42 AArch64TargetLowering::AArch64TargetLowering(AArch64TargetMachine &TM)
298 EVT AArch64TargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const {
337 AArch64TargetLowering::emitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
421 AArch64TargetLowering::emitAtomicBinaryMinMax(MachineInstr *MI,
513 AArch64TargetLowering::emitAtomicCmpSwap(MachineInstr *MI,
593 AArch64TargetLowering::EmitF128CSEL(MachineInstr *MI,
687 AArch64TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
804 const char *AArch64TargetLowering::getTargetNodeName(unsigned Opcode) const {
867 CCAssignFn *AArch64TargetLowering::CCAssignFnForNode(CallingConv::ID CC) const {
878 AArch64TargetLowering::SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG,
947 AArch64TargetLowering::LowerFormalArguments(SDValue Chain,
1061 AArch64TargetLowering::LowerReturn(SDValue Chain,
1135 AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
1399 AArch64TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
1444 AArch64TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
1553 bool AArch64TargetLowering::DoesCalleeRestoreStack(CallingConv::ID CallCC,
1558 bool AArch64TargetLowering::IsTailCallConvention(CallingConv::ID CallCC) const {
1562 SDValue AArch64TargetLowering::addTokenForArgument(SDValue Chain,
1611 bool AArch64TargetLowering::isLegalICmpImmediate(int64_t Val) const {
1622 SDValue AArch64TargetLowering::getSelectableIntSetCC(SDValue LHS, SDValue RHS,
1716 AArch64TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
1746 AArch64TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
1769 AArch64TargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const {
1823 AArch64TargetLowering::LowerF128ToCall(SDValue Op, SelectionDAG &DAG,
1867 AArch64TargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
1882 AArch64TargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
1892 AArch64TargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
1909 AArch64TargetLowering::LowerGlobalAddressELFLarge(SDValue Op,
1934 AArch64TargetLowering::LowerGlobalAddressELFSmall(SDValue Op,
2015 AArch64TargetLowering::LowerGlobalAddressELF(SDValue Op,
2030 SDValue AArch64TargetLowering::LowerTLSDescCall(SDValue SymAddr,
2075 AArch64TargetLowering::LowerGlobalTLSAddress(SDValue Op,
2168 AArch64TargetLowering::LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG,
2186 AArch64TargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
2214 AArch64TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
2270 AArch64TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
2499 AArch64TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
2556 AArch64TargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
2569 AArch64TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
2640 AArch64TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
3240 AArch64TargetLowering::PerformDAGCombine(SDNode *N,
3252 AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const {
3275 AArch64TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
3342 AArch64TargetLowering::ConstraintType
3343 AArch64TargetLowering::getConstraintType(const std::string &Constraint) const {
3378 AArch64TargetLowering::getSingleConstraintMatchWeight(AsmOperandInfo &Info,
3385 AArch64TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
3471 AArch64TargetLowering::getRegForInlineAsmConstraint(
