Lines Matching refs:Op
281 const MCOperand &Op = MI->getOperand(OpNo);
282 if (Op.isReg()) {
283 unsigned Reg = Op.getReg();
285 } else if (Op.isImm()) {
287 << '#' << formatImm(Op.getImm())
290 assert(Op.isExpr() && "unknown operand kind in printOperand");
293 const MCConstantExpr *BranchTarget = dyn_cast<MCConstantExpr>(Op.getExpr());
301 O << *Op.getExpr();
375 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
377 const MCOperand &MO1 = MI->getOperand(Op);
378 const MCOperand &MO2 = MI->getOperand(Op+1);
379 const MCOperand &MO3 = MI->getOperand(Op+2);
406 void ARMInstPrinter::printAddrModeTBB(const MCInst *MI, unsigned Op,
408 const MCOperand &MO1 = MI->getOperand(Op);
409 const MCOperand &MO2 = MI->getOperand(Op+1);
417 void ARMInstPrinter::printAddrModeTBH(const MCInst *MI, unsigned Op,
419 const MCOperand &MO1 = MI->getOperand(Op);
420 const MCOperand &MO2 = MI->getOperand(Op+1);
428 void ARMInstPrinter::printAddrMode2Operand(const MCInst *MI, unsigned Op,
430 const MCOperand &MO1 = MI->getOperand(Op);
433 printOperand(MI, Op, O);
438 const MCOperand &MO3 = MI->getOperand(Op+2);
441 "Should be pre or offset index op");
444 printAM2PreOrOffsetIndexOp(MI, Op, O);
473 void ARMInstPrinter::printAM3PostIndexOp(const MCInst *MI, unsigned Op,
475 const MCOperand &MO1 = MI->getOperand(Op);
476 const MCOperand &MO2 = MI->getOperand(Op+1);
477 const MCOperand &MO3 = MI->getOperand(Op+2);
497 void ARMInstPrinter::printAM3PreOrOffsetIndexOp(const MCInst *MI, unsigned Op,
500 const MCOperand &MO1 = MI->getOperand(Op);
501 const MCOperand &MO2 = MI->getOperand(Op+1);
502 const MCOperand &MO3 = MI->getOperand(Op+2);
514 //If the op is sub we have to print the immediate even if it is 0
516 ARM_AM::AddrOpc op = ARM_AM::getAM3Op(MO3.getImm());
518 if (AlwaysPrintImm0 || ImmOffs || (op == ARM_AM::sub)) {
522 << ARM_AM::getAddrOpcStr(op)
530 Op,
532 const MCOperand &MO1 = MI->getOperand(Op);
534 printOperand(MI, Op, O);
538 const MCOperand &MO3 = MI->getOperand(Op+2);
542 printAM3PostIndexOp(MI, Op, O);
545 printAM3PreOrOffsetIndexOp(MI, Op, O, AlwaysPrintImm0);
618 unsigned Op = ARM_AM::getAM5Op(MO2.getImm());
619 if (AlwaysPrintImm0 || ImmOffs || Op == ARM_AM::sub) {
747 const MCOperand &Op = MI->getOperand(OpNum);
748 if (Op.getImm())
756 const MCOperand &Op = MI->getOperand(OpNum);
757 O << ARM_PROC::IModToString(Op.getImm());
762 const MCOperand &Op = MI->getOperand(OpNum);
763 unsigned IFlags = Op.getImm();
774 const MCOperand &Op = MI->getOperand(OpNum);
775 unsigned SpecRegRBit = Op.getImm() >> 4;
776 unsigned Mask = Op.getImm() & 0xf;
779 unsigned SYSm = Op.getImm();
957 void ARMInstPrinter::printThumbAddrModeRROperand(const MCInst *MI, unsigned Op,
959 const MCOperand &MO1 = MI->getOperand(Op);
960 const MCOperand &MO2 = MI->getOperand(Op + 1);
963 printOperand(MI, Op, O);
977 unsigned Op,
980 const MCOperand &MO1 = MI->getOperand(Op);
981 const MCOperand &MO2 = MI->getOperand(Op + 1);
984 printOperand(MI, Op, O);
1000 unsigned Op,
1002 printThumbAddrModeImm5SOperand(MI, Op, O, 1);
1006 unsigned Op,
1008 printThumbAddrModeImm5SOperand(MI, Op, O, 2);
1012 unsigned Op,
1014 printThumbAddrModeImm5SOperand(MI, Op, O, 4);
1017 void ARMInstPrinter::printThumbAddrModeSPOperand(const MCInst *MI, unsigned Op,
1019 printThumbAddrModeImm5SOperand(MI, Op, O, 4);
