Home | History | Annotate | Download | only in Hexagon

Lines Matching refs:Src1

730   // def STrid : STInst<(outs), (ins MEMri:$addr, DoubleRegs:$src1), ...
925 // i16:Other),IntRegs:i32:$src1, SETLT:Other),IntRegs:i32:$src1,
927 // Emits: (MAXh_rr:i32 IntRegs:i32:$src1, IntRegs:i32:$src2)
949 // i16:Other), IntRegs:i32:$src1, SETGT:Other), IntRegs:i32:$src1,
951 // Emits: (MINh_rr:i32 IntRegs:i32:$src1, IntRegs:i32:$src2)
1328 SDNode* Src1 = N->getOperand(0).getNode();
1329 if (Src1->getOpcode() != ISD::SRA || !Src1->hasOneUse()
1330 || Src1->getValueType(0) != MVT::i32) {
1338 Src1->getOperand(0),
1339 Src1->getOperand(1));