Lines Matching refs:Op
337 NVPTXTargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
338 SDLoc dl(Op);
339 const GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal();
340 Op = DAG.getTargetGlobalAddress(GV, dl, getPointerTy());
341 return DAG.getNode(NVPTXISD::Wrapper, dl, getPointerTy(), Op);
877 // Op to just print "call"
1117 NVPTXTargetLowering::LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const {
1118 SDNode *Node = Op.getNode();
1137 NVPTXTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
1138 switch (Op.getOpcode()) {
1144 return LowerGlobalAddress(Op, DAG);
1146 return Op;
1149 return Op;
1151 return LowerCONCAT_VECTORS(Op, DAG);
1153 return LowerSTORE(Op, DAG);
1155 return LowerLOAD(Op, DAG);
1161 SDValue NVPTXTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
1162 if (Op.getValueType() == MVT::i1)
1163 return LowerLOADi1(Op, DAG);
1172 SDValue NVPTXTargetLowering::LowerLOADi1(SDValue Op, SelectionDAG &DAG) const {
1173 SDNode *Node = Op.getNode();
1191 SDValue NVPTXTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
1192 EVT ValVT = Op.getOperand(1).getValueType();
1194 return LowerSTOREi1(Op, DAG);
1196 return LowerSTOREVector(Op, DAG);
1202 NVPTXTargetLowering::LowerSTOREVector(SDValue Op, SelectionDAG &DAG) const {
1203 SDNode *N = Op.getNode();
1290 SDValue NVPTXTargetLowering::LowerSTOREi1(SDValue Op, SelectionDAG &DAG) const {
1291 SDNode *Node = Op.getNode();
1848 SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops,
1853 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
