Lines Matching refs:Op
28 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
29 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
40 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
43 bool isHWTrueValue(SDValue Op) const;
44 bool isHWFalseValue(SDValue Op) const;
66 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
68 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
69 SDValue LowerMinMax(SDValue Op, SelectionDAG &DAG) const;
82 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
99 SDValue LowerSREM(SDValue Op, SelectionDAG &DAG) const;
100 SDValue LowerSREM8(SDValue Op, SelectionDAG &DAG) const;
101 SDValue LowerSREM16(SDValue Op, SelectionDAG &DAG) const;
102 SDValue LowerSREM32(SDValue Op, SelectionDAG &DAG) const;
103 SDValue LowerSREM64(SDValue Op, SelectionDAG &DAG) const;
104 SDValue LowerSDIV(SDValue Op, SelectionDAG &DAG) const;
105 SDValue LowerSDIV24(SDValue Op, SelectionDAG &DAG) const;
106 SDValue LowerSDIV32(SDValue Op, SelectionDAG &DAG) const;
107 SDValue LowerSDIV64(SDValue Op, SelectionDAG &DAG) const;
108 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
110 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
111 SDValue LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const;