Lines Matching refs:Op
349 getTransSwizzle(R600InstrInfo::BankSwizzle Swz, unsigned Op) {
353 return Cycles[Op];
357 return Cycles[Op];
361 return Cycles[Op];
365 return Cycles[Op];
492 unsigned Op = getOperandIdx(IG[i]->getOpcode(),
495 IG[i]->getOperand(Op).getImm());
686 int R600InstrInfo::getBranchInstr(const MachineOperand &op) const {
687 const MachineInstr *MI = op.getParent();
1140 static unsigned getSlotedOps(unsigned Op, unsigned Slot) {
1141 switch (Op) {
1220 int R600InstrInfo::getOperandIdx(const MachineInstr &MI, unsigned Op) const {
1221 return getOperandIdx(MI.getOpcode(), Op);
1224 int R600InstrInfo::getOperandIdx(unsigned Opcode, unsigned Op) const {
1225 return AMDGPU::getNamedOperandIdx(Opcode, Op);
1228 void R600InstrInfo::setImmOperand(MachineInstr *MI, unsigned Op,
1230 int Idx = getOperandIdx(*MI, Op);
