Lines Matching defs:VReg
707 // VReg or and SReg. In order to get a more accurate1019 unsigned VReg = MI->getOperand(0).getReg();1034 MRI.setRegClass(VReg, RC);1076 SDValue VReg = AMDGPUTargetLowering::CreateLiveInRegister(DAG, RC, Reg, VT);1079 cast<RegisterSDNode>(VReg)->getReg(), VT);