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Lines Matching refs:Op

105                           unsigned Op, unsigned RegOpcodeField,
452 unsigned Op,unsigned RegOpcodeField,
454 const MachineOperand &Op3 = MI.getOperand(Op+3);
480 const MachineOperand &Base = MI.getOperand(Op);
481 const MachineOperand &Scale = MI.getOperand(Op+1);
482 const MachineOperand &IndexReg = MI.getOperand(Op+2);
613 /// a 16-bit memory operand. Op specifies the operand # of the memoperand.
614 static bool Is16BitMemOperand(const MachineInstr &MI, unsigned Op) {
615 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg);
616 const MachineOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
627 /// a 32-bit memory operand. Op specifies the operand # of the memoperand.
628 static bool Is32BitMemOperand(const MachineInstr &MI, unsigned Op) {
629 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg);
630 const MachineOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);
641 /// a 64-bit memory operand. Op specifies the operand # of the memoperand.
643 static bool Is64BitMemOperand(const MachineInstr &MI, unsigned Op) {
644 const MachineOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg);
645 const MachineOperand &IndexReg = MI.getOperand(Op+X86::AddrIndexReg);