Lines Matching refs:NVT
186 SDNode *SelectAtomicLoadArith(SDNode *Node, EVT NVT);
1709 enum AtomicOpc &Op, EVT NVT,
1730 return CurDAG->getTargetConstant(CNVal, NVT);
1743 if (Val.getOpcode() == ISD::TRUNCATE && NVT == MVT::i16 &&
1748 return CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl, NVT,
1756 SDNode *X86DAGToDAGISel::SelectAtomicLoadArith(SDNode *Node, EVT NVT) {
1791 Val = getAtomicLoadArithTargetConstant(CurDAG, dl, Op, NVT, Val);
1796 switch (NVT.getSimpleVT().SimpleTy) {
1837 dl, NVT), 0);
2050 EVT NVT = Node->getValueType(0);
2155 SDNode *RetVal = SelectAtomicLoadArith(Node, NVT);
2172 if (NVT != MVT::i32 && NVT != MVT::i64)
2190 EVT CstVT = NVT;
2202 if (NVT == CstVT)
2205 switch (NVT.getSimpleVT().SimpleTy) {
2233 NVT, N0->getOperand(0),NewCst);
2234 return CurDAG->SelectNodeTo(Node, ShlOp, NVT, SDValue(New, 0),
2242 switch (NVT.getSimpleVT().SimpleTy) {
2253 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::i32);
2271 switch (NVT.getSimpleVT().SimpleTy) {
2281 switch (NVT.getSimpleVT().SimpleTy) {
2335 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::Other, MVT::Glue);
2353 SDVTList VTs = CurDAG->getVTList(NVT, NVT, MVT::Glue);
2389 ResLo = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, LoReg, NVT,
2400 ResHi = CurDAG->getCopyFromReg(CurDAG->getEntryNode(), dl, HiReg, NVT,
2418 switch (NVT.getSimpleVT().SimpleTy) {
2426 switch (NVT.getSimpleVT().SimpleTy) {
2437 switch (NVT.getSimpleVT().SimpleTy) {
2463 if (NVT == MVT::i8 && (!isSigned || signBitIsZero)) {
2491 SDValue ClrNode = SDValue(CurDAG->getMachineNode(X86::MOV32r0, dl, NVT), 0);
2492 switch (NVT.getSimpleVT().SimpleTy) {
2563 LoReg, NVT, InFlag);
2571 HiReg, NVT, InFlag);
