Lines Matching refs:Op
261 SDValue SITargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const
263 switch (Op.getOpcode()) {
264 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
265 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
266 case ISD::LOAD: return LowerLOAD(Op, DAG);
267 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
268 case ISD::AND: return Loweri1ContextSwitch(Op, DAG, ISD::AND);
271 cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
272 EVT VT = Op.getValueType();
277 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
293 SDValue SITargetLowering::Loweri1ContextSwitch(SDValue Op,
297 DebugLoc DL = Op.getDebugLoc();
301 Op.getOperand(0)),
303 Op.getOperand(1)));
308 SDValue SITargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const
310 SDValue Chain = Op.getOperand(0);
311 SDValue CC = Op.getOperand(1);
312 SDValue LHS = Op.getOperand(2);
313 SDValue RHS = Op.getOperand(3);
314 SDValue JumpT = Op.getOperand(4);
319 Op.getDebugLoc(),
332 SDValue SITargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const
334 EVT VT = Op.getValueType();
335 LoadSDNode *Ptr = dyn_cast<LoadSDNode>(Op);
369 DAG.ReplaceAllUsesOfValueWith(Op, CreateLiveInRegister(DAG, dstClass, Reg,
374 SDValue SITargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
376 SDValue LHS = Op.getOperand(0);
377 SDValue RHS = Op.getOperand(1);
378 SDValue True = Op.getOperand(2);
379 SDValue False = Op.getOperand(3);
380 SDValue CC = Op.getOperand(4);
381 EVT VT = Op.getValueType();
382 DebugLoc DL = Op.getDebugLoc();
