Lines Matching defs:REG
1898 DwVfpRegister reg = DwVfpRegister::from_code(i);
1899 __ vstr(reg, MemOperand(sp, i * kDoubleSize));
1915 DwVfpRegister reg = DwVfpRegister::from_code(i);
1916 __ vldr(reg, MemOperand(sp, i * kDoubleSize));
7088 #define REG(Name) { kRegister_ ## Name ## _Code }
7092 { REG(r6), REG(r4), REG(r7), EMIT_REMEMBERED_SET },
7093 { REG(r6), REG(r2), REG(r7), EMIT_REMEMBERED_SET },
7097 { REG(r3), REG(r4), REG(r5), EMIT_REMEMBERED_SET },
7099 { REG(r4), REG(r1), REG(r2), OMIT_REMEMBERED_SET },
7101 { REG(r1), REG(r2), REG(r3), EMIT_REMEMBERED_SET },
7102 { REG(r3), REG(r2), REG(r1), EMIT_REMEMBERED_SET },
7104 { REG(r2), REG(r1), REG(r3), EMIT_REMEMBERED_SET },
7105 { REG(r3), REG(r1), REG(r2), EMIT_REMEMBERED_SET },
7107 { REG(r3), REG(r2), REG(r4), EMIT_REMEMBERED_SET },
7108 { REG(r2), REG(r3), REG(r4), EMIT_REMEMBERED_SET },
7112 { REG(r2), REG(r3), REG(r9), EMIT_REMEMBERED_SET },
7113 { REG(r2), REG(r3), REG(r9), OMIT_REMEMBERED_SET },
7115 { REG(r6), REG(r2), REG(r0), EMIT_REMEMBERED_SET },
7116 { REG(r2), REG(r6), REG(r9), EMIT_REMEMBERED_SET },
7118 { REG(r5), REG(r0), REG(r6), EMIT_REMEMBERED_SET },
7120 { REG(no_reg), REG(no_reg), REG(no_reg), EMIT_REMEMBERED_SET}
7123 #undef REG
