Lines Matching refs:ppHRegMIPS
41 void ppHRegMIPS(HReg reg, Bool mode64)
93 vpanic("ppHRegMIPS");
900 ppHRegMIPS(am->Mam.IR.base, mode64);
904 ppHRegMIPS(am->Mam.RR.base, mode64);
906 ppHRegMIPS(am->Mam.RR.index, mode64);
981 ppHRegMIPS(op->Mrh.Reg.reg, mode64);
1484 ppHRegMIPS(dst, mode64);
1500 ppHRegMIPS(i->Min.Alu.dst, mode64);
1502 ppHRegMIPS(r_srcL, mode64);
1513 ppHRegMIPS(i->Min.Shft.dst, mode64);
1515 ppHRegMIPS(r_srcL, mode64);
1522 ppHRegMIPS(i->Min.Unary.dst, mode64);
1524 ppHRegMIPS(i->Min.Unary.src, mode64);
1529 ppHRegMIPS(i->Min.Cmp.dst, mode64);
1531 ppHRegMIPS(i->Min.Cmp.srcL, mode64);
1533 ppHRegMIPS(i->Min.Cmp.srcR, mode64);
1542 ppHRegMIPS(i->Min.Mul.dst, mode64);
1544 ppHRegMIPS(i->Min.Mul.srcL, mode64);
1546 ppHRegMIPS(i->Min.Mul.srcR, mode64);
1551 ppHRegMIPS(i->Min.Mul.dst, mode64);
1553 ppHRegMIPS(i->Min.Mul.srcL, mode64);
1555 ppHRegMIPS(i->Min.Mul.srcR, mode64);
1562 ppHRegMIPS(i->Min.MtHL.src, mode64);
1567 ppHRegMIPS(i->Min.MtHL.src, mode64);
1572 ppHRegMIPS(i->Min.MfHL.dst, mode64);
1577 ppHRegMIPS(i->Min.MfHL.dst, mode64);
1582 ppHRegMIPS(i->Min.Macc.srcL, mode64);
1584 ppHRegMIPS(i->Min.Macc.srcR, mode64);
1592 ppHRegMIPS(i->Min.Div.srcL, mode64);
1594 ppHRegMIPS(i->Min.Div.srcR, mode64);
1631 ppHRegMIPS(i->Min.XIndir.dstGA, mode64);
1641 ppHRegMIPS(i->Min.XAssisted.dstGA, mode64);
1653 ppHRegMIPS(i->Min.Load.dst, mode64);
1663 ppHRegMIPS(i->Min.Store.src, mode64);
1670 ppHRegMIPS(i->Min.LoadL.dst, mode64);
1677 ppHRegMIPS(i->Min.StoreC.src, mode64);
1684 ppHRegMIPS(i->Min.RdWrLR.gpr, mode64);
1689 ppHRegMIPS(i->Min.FpUnary.dst, mode64);
1691 ppHRegMIPS(i->Min.FpUnary.src, mode64);
1695 ppHRegMIPS(i->Min.FpBinary.dst, mode64);
1697 ppHRegMIPS(i->Min.FpBinary.srcL, mode64);
1699 ppHRegMIPS(i->Min.FpBinary.srcR, mode64);
1703 ppHRegMIPS(i->Min.FpConvert.dst, mode64);
1705 ppHRegMIPS(i->Min.FpConvert.src, mode64);
1709 ppHRegMIPS(i->Min.FpCompare.srcL, mode64);
1711 ppHRegMIPS(i->Min.FpCompare.srcR, mode64);
1716 ppHRegMIPS(i->Min.FpMulAcc.dst, mode64);
1718 ppHRegMIPS(i->Min.FpMulAcc.srcML, mode64);
1720 ppHRegMIPS(i->Min.FpMulAcc.srcMR, mode64);
1722 ppHRegMIPS(i->Min.FpMulAcc.srcAcc, mode64);
1728 ppHRegMIPS(i->Min.FpLdSt.reg, mode64);
1733 ppHRegMIPS(i->Min.FpLdSt.reg, mode64);
1743 ppHRegMIPS(i->Min.FpLdSt.reg, mode64);
1751 ppHRegMIPS(i->Min.FpLdSt.reg, mode64);
1768 ppHRegMIPS(i->Min.MtFCSR.src, mode64);
1775 ppHRegMIPS(i->Min.MfFCSR.dst, mode64);
