Lines Matching refs:Bool
43 extern void ppHRegMIPS(HReg, Bool);
45 extern HReg hregMIPS_GPR0(Bool mode64); // scratch reg / zero reg
46 extern HReg hregMIPS_GPR1(Bool mode64); // reserved for trap handling
47 extern HReg hregMIPS_GPR2(Bool mode64); // reserved for trap handling
48 extern HReg hregMIPS_GPR3(Bool mode64);
49 extern HReg hregMIPS_GPR4(Bool mode64);
50 extern HReg hregMIPS_GPR5(Bool mode64);
51 extern HReg hregMIPS_GPR6(Bool mode64);
52 extern HReg hregMIPS_GPR7(Bool mode64);
53 extern HReg hregMIPS_GPR8(Bool mode64);
54 extern HReg hregMIPS_GPR9(Bool mode64);
55 extern HReg hregMIPS_GPR10(Bool mode64);
56 extern HReg hregMIPS_GPR11(Bool mode64);
57 extern HReg hregMIPS_GPR12(Bool mode64);
58 extern HReg hregMIPS_GPR13(Bool mode64);
59 extern HReg hregMIPS_GPR14(Bool mode64);
60 extern HReg hregMIPS_GPR15(Bool mode64);
61 extern HReg hregMIPS_GPR16(Bool mode64);
62 extern HReg hregMIPS_GPR17(Bool mode64);
63 extern HReg hregMIPS_GPR18(Bool mode64);
64 extern HReg hregMIPS_GPR19(Bool mode64);
65 extern HReg hregMIPS_GPR20(Bool mode64);
66 extern HReg hregMIPS_GPR21(Bool mode64);
67 extern HReg hregMIPS_GPR22(Bool mode64);
68 extern HReg hregMIPS_GPR23(Bool mode64); // GuestStatePtr
69 extern HReg hregMIPS_GPR24(Bool mode64); // reserved for dispatcher
70 extern HReg hregMIPS_GPR25(Bool mode64);
71 extern HReg hregMIPS_GPR26(Bool mode64);
72 extern HReg hregMIPS_GPR27(Bool mode64);
73 extern HReg hregMIPS_GPR28(Bool mode64);
74 extern HReg hregMIPS_GPR29(Bool mode64);
75 extern HReg hregMIPS_GPR30(Bool mode64);
76 extern HReg hregMIPS_GPR31(Bool mode64);
77 extern HReg hregMIPS_PC(Bool mode64);
79 extern HReg hregMIPS_HI(Bool mode64);
80 extern HReg hregMIPS_LO(Bool mode64);
82 extern HReg hregMIPS_F0(Bool mode64);
83 extern HReg hregMIPS_F1(Bool mode64);
84 extern HReg hregMIPS_F2(Bool mode64);
85 extern HReg hregMIPS_F3(Bool mode64);
86 extern HReg hregMIPS_F4(Bool mode64);
87 extern HReg hregMIPS_F5(Bool mode64);
88 extern HReg hregMIPS_F6(Bool mode64);
89 extern HReg hregMIPS_F7(Bool mode64);
90 extern HReg hregMIPS_F8(Bool mode64);
91 extern HReg hregMIPS_F9(Bool mode64);
92 extern HReg hregMIPS_F10(Bool mode64);
93 extern HReg hregMIPS_F11(Bool mode64);
94 extern HReg hregMIPS_F12(Bool mode64);
95 extern HReg hregMIPS_F13(Bool mode64);
96 extern HReg hregMIPS_F14(Bool mode64);
97 extern HReg hregMIPS_F15(Bool mode64);
98 extern HReg hregMIPS_F16(Bool mode64);
99 extern HReg hregMIPS_F17(Bool mode64);
100 extern HReg hregMIPS_F18(Bool mode64);
101 extern HReg hregMIPS_F19(Bool mode64);
102 extern HReg hregMIPS_F20(Bool mode64);
103 extern HReg hregMIPS_F21(Bool mode64);
104 extern HReg hregMIPS_F22(Bool mode64);
105 extern HReg hregMIPS_F23(Bool mode64);
106 extern HReg hregMIPS_F24(Bool mode64);
107 extern HReg hregMIPS_F25(Bool mode64);
108 extern HReg hregMIPS_F26(Bool mode64);
109 extern HReg hregMIPS_F27(Bool mode64);
110 extern HReg hregMIPS_F28(Bool mode64);
111 extern HReg hregMIPS_F29(Bool mode64);
112 extern HReg hregMIPS_F30(Bool mode64);
113 extern HReg hregMIPS_F31(Bool mode64);
208 extern void ppMIPSAMode(MIPSAMode *, Bool);
221 Bool syned;
230 extern void ppMIPSRH(MIPSRH *, Bool);
232 extern MIPSRH *MIPSRH_Imm(Bool, UShort);
318 Bool /* is the 2nd operand an immediate? */ );
328 Bool /* is the 2nd operand an immediate? */ ,
329 Bool /* is this a 32bit or 64bit op? */ );
337 extern HChar *showMIPSMaccOp(MIPSMaccOp, Bool);
444 Bool sz32; /* mode64 has both 32 and 64bit shft */
457 Bool syned;
458 Bool sz32;
466 Bool widening; //True => widening, False => non-widening
467 Bool syned; //signed/unsigned - meaningless if widenind = False
468 Bool sz32;
474 Bool syned; //signed/unsigned - meaningless if widenind = False
475 Bool sz32;
500 Bool toFastEP; /* chain to the slow or fast point? */
551 Bool wrLR;
558 Bool syned;
584 Bool isLoad;
633 extern MIPSInstr *MIPSInstr_Shft(MIPSShftOp, Bool sz32, HReg, HReg, MIPSRH *);
635 extern MIPSInstr *MIPSInstr_Cmp(Bool, Bool, HReg, HReg, HReg, MIPSCondCode);
637 extern MIPSInstr *MIPSInstr_Mul(Bool syned, Bool hi32, Bool sz32, HReg,
639 extern MIPSInstr *MIPSInstr_Div(Bool syned, Bool sz32, HReg, HReg);
640 extern MIPSInstr *MIPSInstr_Madd(Bool, HReg, HReg);
641 extern MIPSInstr *MIPSInstr_Msub(Bool, HReg, HReg);
644 Bool mode64);
646 Bool mode64);
649 Bool mode64);
651 Bool mode64);
657 MIPSCondCode cond, Bool toFastEP);
671 extern MIPSInstr *MIPSInstr_FpLdSt(Bool isLoad, UChar sz, HReg, MIPSAMode *);
674 extern MIPSInstr *MIPSInstr_FpCftI(Bool fromI, Bool int32, HReg dst, HReg src);
685 extern MIPSInstr *MIPSInstr_RdWrLR(Bool wrLR, HReg gpr);
695 extern void ppMIPSInstr(MIPSInstr *, Bool mode64);
699 extern void getRegUsage_MIPSInstr (HRegUsage *, MIPSInstr *, Bool);
700 extern void mapRegs_MIPSInstr (HRegRemap *, MIPSInstr *, Bool mode64);
701 extern Bool isMove_MIPSInstr (MIPSInstr *, HReg *, HReg *);
702 extern Int emit_MIPSInstr (/*MB_MOD*/Bool* is_profInc,
704 Bool mode64,
711 HReg rreg, Int offset, Bool);
713 HReg rreg, Int offset, Bool);
715 extern void getAllocableRegs_MIPS (Int *, HReg **, Bool mode64);
722 Bool chainingAllowed,
723 Bool addProfInc,
737 Bool mode64 );
742 Bool mode64 );
747 Bool mode64 );
