Lines Matching refs:mode64
62 GPR11 if mode64: not used - calls by ptr / env ptr for some langs
63 GPR12 if mode64: not used - exceptions / global linkage code
71 if (mode64)
86 if (mode64)
280 Bool mode64;
317 vassert(!env->mode64);
331 ppPPCInstr(instr, env->mode64);
338 HReg reg = mkHReg(env->vreg_ctr, HRcGPR(env->mode64),
484 HReg sp = StackFramePtr(env->mode64);
492 HReg sp = StackFramePtr(env->mode64);
508 addInstr(env, mk_iMOVds_RR(r, StackFramePtr(env->mode64)));
514 PPCInstr_LI(align16, 0xFFFFFFFFFFFFFFF0ULL, env->mode64));
528 vassert(!env->mode64);
533 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
534 am_addr1 = PPCAMode_IR( 4, StackFramePtr(env->mode64) );
537 addInstr(env, PPCInstr_Store( 4, am_addr0, r_srcHi, env->mode64 ));
538 addInstr(env, PPCInstr_Store( 4, am_addr1, r_srcLo, env->mode64 ));
553 vassert(env->mode64);
557 am_addr0 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
560 addInstr(env, PPCInstr_Store( 8, am_addr0, r_src, env->mode64 ));
635 env->mode64 ? False : True/*F:64-bit, T:32-bit shift*/,
643 PPCAMode_RR( GuestStatePtr(env->mode64), rtmp );
684 Bool mode64 = env->mode64;
689 = (!mode64) && env->vbi->host_ppc32_regalign_int64_args;
699 (mode32:32 | mode64:64) integer bits in total can be passed.
700 In fact the only supported arg type is (mode32:I32 | mode64:I64).
750 argregs[0] = hregPPC_GPR3(mode64);
751 argregs[1] = hregPPC_GPR4(mode64);
752 argregs[2] = hregPPC_GPR5(mode64);
753 argregs[3] = hregPPC_GPR6(mode64);
754 argregs[4] = hregPPC_GPR7(mode64);
755 argregs[5] = hregPPC_GPR8(mode64);
756 argregs[6] = hregPPC_GPR9(mode64);
757 argregs[7] = hregPPC_GPR10(mode64);
800 GuestStatePtr(mode64) ));
808 if (!mode64) {
826 } else { // mode64
847 GuestStatePtr(mode64) ));
855 if (!mode64) {
868 } else { // mode64
901 target = mode64 ? Ptr_to_ULong(cee->addr) :
925 // addInstr(env, PPCInstr_LI(r_src, 0x0, env->mode64));
926 // if (env->mode64) {
954 vassert(hregClass(r_rmIR) == HRcGPR(env->mode64));
1032 if (env->mode64) {
1045 addInstr( env, PPCInstr_LI( r_zero, 0, env->mode64 ) );
1143 addInstr(env, PPCInstr_LI(r_src, (Long)simm32, env->mode64));
1164 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, env->mode64 ));
1216 All results are returned in a (mode64 ? 64bit : 32bit) register.
1230 vassert(hregClass(r) == HRcGPR(env->mode64));
1238 Bool mode64 = env->mode64;
1244 ty == Ity_I32 || ((ty == Ity_I64) && mode64));
1261 r_dst, am_addr, mode64 ));
1328 if (!mode64)
1355 vassert(mode64);
1392 vassert(mode64);
1420 if (mode64
1463 vassert(mode64);
1489 vassert(mode64);
1493 addInstr(env, PPCInstr_LI(msk, 0xFFFFFFFF, mode64));
1581 /* This works in both mode64 and mode32. */
1582 HReg r1 = StackFramePtr(env->mode64);
1598 addInstr(env, PPCInstr_Load(4, idst, zero_r1, mode64));
1601 if (mode64)
1612 if (mode64) {
1613 HReg r1 = StackFramePtr(env->mode64);
1628 addInstr(env, PPCInstr_Load(8, idst, zero_r1, True/*mode64*/));
1666 addInstr(env, PPCInstr_Load(2,r_dst,amode, mode64));
1688 vassert(mode64);
1716 vassert(mode64);
1728 vassert(mode64);
1740 if (op_unop == Iop_Not64) vassert(mode64);
1747 if (!mode64) {
1761 if (!mode64) {
1771 if (mode64) { /* This is a no-op. */
1787 if (mode64) {
1794 if (mode64) {
1803 if ((op_unop != Iop_1Uto64) || mode64) {
1826 if (mode64) {
1843 if (op_unop == Iop_Clz64 && !mode64)
1856 if (op_unop == Iop_Left64 && !mode64)
1878 if (!mode64) goto irreducible;
1902 PPCInstr_Load( 4, dst, am_off12, mode64 ));
1910 if (mode64) {
1929 mode64 ));
1946 if (mode64) {
1952 am_addr = PPCAMode_IR( 0, StackFramePtr(mode64) );
1958 addInstr(env, PPCInstr_Load( 8, r_dst, am_addr, mode64 ));
1976 am_addr = PPCAMode_IR( 0, StackFramePtr(mode64) );
1982 addInstr(env, PPCInstr_Load( 4, r_dst, am_addr, mode64 ));
1990 if (mode64) {
1996 am_addr = PPCAMode_IR( 0, StackFramePtr(mode64) );
2002 addInstr(env, PPCInstr_Load( 8, r_dst, am_addr, mode64 ));
2018 argregs[0] = hregPPC_GPR3(mode64);
2043 argregs[0] = hregPPC_GPR3(mode64);
2067 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) {
2070 GuestStatePtr(mode64) );
2072 r_dst, am_addr, mode64 ));
2083 if (mode64 && ty == Ity_I64) {
2085 r_dst, src_am, mode64 ));
2088 if ((!mode64) && ty == Ity_I32) {
2090 r_dst, src_am, mode64 ));
2111 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
2122 case Ico_U64: if (!mode64) goto irreducible;
2129 addInstr(env, PPCInstr_LI(r_dst, (ULong)l, mode64));
2136 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) &&
2203 Bool mode64 = env->mode64;
2208 return toBool( hregClass(am->Pam.IR.base) == HRcGPR(mode64) &&
2212 return toBool( hregClass(am->Pam.RR.base) == HRcGPR(mode64) &&
2214 hregClass(am->Pam.RR.index) == HRcGPR(mode64) &&
2234 if (env->mode64) {
2320 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2335 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2343 case Ico_U64: vassert(env->mode64);
2380 vassert(hregClass(ri->Pri.Reg) == HRcGPR(env->mode64));
2394 ty == Ity_I32 || ((ty == Ity_I64) && env->mode64));
2400 case Ico_U64: vassert(env->mode64);
2424 vassert(!env->mode64);
2433 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2469 vassert(env->mode64);
2478 vassert(hregClass(ri->Prh.Reg.reg) == HRcGPR(env->mode64));
2527 addInstr(env, PPCInstr_LI(r_zero, 0, env->mode64));
2615 if (!env->mode64) {
2623 } else { // mode64
2645 vassert(env->mode64);
2690 vassert(env->mode64);
2695 vassert(hregClass(*rHi) == HRcGPR(env->mode64));
2697 vassert(hregClass(*rLo) == HRcGPR(env->mode64));
2769 vassert(!env->mode64);
2825 vassert(!env->mode64);
2848 vassert(!env->mode64);
2989 HReg r1 = StackFramePtr(env->mode64);
2995 vassert(!env->mode64);
3050 vassert(env->mode64 == False);
3051 addInstr(env, PPCInstr_LI(zero32, 0, env->mode64));
3244 Bool mode64 = env->mode64;
3246 argregs[0] = hregPPC_GPR3(mode64);
3247 argregs[1] = hregPPC_GPR4(mode64);
3282 Bool mode64 = env->mode64;
3284 argregs[0] = hregPPC_GPR3(mode64);
3285 argregs[1] = hregPPC_GPR4(mode64);
3343 Bool mode64 = env->mode64;
3364 GuestStatePtr(env->mode64) );
3400 PPCAMode* zero_r1 = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
3414 if (mode64) {
3417 HReg r1 = StackFramePtr(env->mode64);
3425 addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
3440 HReg r1 = StackFramePtr(env->mode64);
3514 Bool mode64 = env->mode64;
3540 if (!mode64) {
3543 addInstr(env, PPCInstr_LI(r_srcHi, u.u32x2[0], mode64));
3544 addInstr(env, PPCInstr_LI(r_srcLo, u.u32x2[1], mode64));
3546 } else { // mode64
3548 addInstr(env, PPCInstr_LI(r_src, u.u64, mode64));
3567 GuestStatePtr(mode64) );
3662 if (mode64) {
3665 HReg r1 = StackFramePtr(env->mode64);
3673 addInstr(env, PPCInstr_Store(8, zero_r1, isrc, True/*mode64*/));
3689 HReg r1 = StackFramePtr(env->mode64);
3744 if (!mode64) {
3764 am_addr = PPCAMode_IR( 0, StackFramePtr(env->mode64) );
3767 addInstr(env, PPCInstr_Store( 4, am_addr, src, env->mode64 ));
3823 Bool mode64 = env->mode64;
3838 GuestStatePtr(mode64) );
3855 if (!mode64) {
4257 Bool mode64 = env->mode64;
4275 GuestStatePtr(mode64) )));
4362 addInstr(env, PPCInstr_LI(r_zeros, 0x0, mode64));
4363 addInstr(env, PPCInstr_Store( 4, am_off0, r_zeros, mode64 ));
4364 addInstr(env, PPCInstr_Store( 4, am_off4, r_zeros, mode64 ));
4365 addInstr(env, PPCInstr_Store( 4, am_off8, r_zeros, mode64 ));
4368 addInstr(env, PPCInstr_Store( 4, am_off12, r_src, mode64 ));
4391 if (!mode64) {
4407 addInstr(env, PPCInstr_Store( 4, am_off12, r0, mode64 ));
4408 addInstr(env, PPCInstr_Store( 4, am_off8, r1, mode64 ));
4411 addInstr(env, PPCInstr_Store( 4, am_off4, r2, mode64 ));
4412 addInstr(env, PPCInstr_Store( 4, am_off0, r3, mode64 ));
4434 addInstr(env, PPCInstr_Store( 8, am_off0, rHi, mode64 ));
4435 addInstr(env, PPCInstr_Store( 8, am_off8, rLo, mode64 ));
4659 LibVEX_ppVexHwCaps(mode64 ? VexArchPPC64 : VexArchPPC32,
4672 Bool mode64 = env->mode64;
4689 if (!mode64 && (tya != Ity_I32))
4691 if (mode64 && (tya != Ity_I64))
4695 (mode64 && (tyd == Ity_I64))) {
4700 am_addr, r_src, mode64 ));
4727 if (tyd == Ity_I64 && !mode64) {
4751 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) {
4754 GuestStatePtr(mode64) );
4756 am_addr, r_src, mode64 ));
4759 if (!mode64 && ty == Ity_I64) {
4762 GuestStatePtr(mode64) );
4765 addInstr(env, PPCInstr_Store( 4, am_addr, rHi, mode64 ));
4766 addInstr(env, PPCInstr_Store( 4, am_addr4, rLo, mode64 ));
4774 GuestStatePtr(mode64) );
4782 GuestStatePtr(mode64) );
4790 GuestStatePtr(mode64) );
4806 if (mode64 && ty == Ity_I64) {
4809 dst_am, r_src, mode64 ));
4812 if ((!mode64) && ty == Ity_I32) {
4815 dst_am, r_src, mode64 ));
4826 ty == Ity_I32 || ((ty == Ity_I64) && mode64)) {
4832 if (!mode64 && ty == Ity_I64) {
4841 if (mode64 && ty == Ity_I128) {
4849 if (!mode64 && ty == Ity_I128) {
4916 if (!mode64 && (tyAddr != Ity_I32))
4918 if (mode64 && (tyAddr != Ity_I64))
4926 addInstr(env, PPCInstr_LoadL( 4, r_dst, r_addr, mode64 ));
4929 if (tyRes == Ity_I64 && mode64) {
4930 addInstr(env, PPCInstr_LoadL( 8, r_dst, r_addr, mode64 ));
4943 if (tyData == Ity_I32 || (tyData == Ity_I64 && mode64)) {
4945 r_a, r_src, mode64 ));
4949 env->mode64 ? False : True
4988 if (!mode64 && retty == Ity_I64) {
4993 addInstr(env, mk_iMOVds_RR(r_dstHi, hregPPC_GPR3(mode64)));
4994 addInstr(env, mk_iMOVds_RR(r_dstLo, hregPPC_GPR4(mode64)));
4998 retty == Ity_I32 || ((retty == Ity_I64) && mode64)) {
5002 addInstr(env, mk_iMOVds_RR(r_dst, hregPPC_GPR3(mode64)));
5038 if (!mode64 && dst->tag != Ico_U32)
5040 if (mode64 && dst->tag != Ico_U64)
5045 hregPPC_GPR31(mode64));
5056 = mode64
5061 mode64 ? (Addr64)stmt->Ist.Exit.dst->Ico.U64
5128 vassert(cdst->tag == (env->mode64 ? Ico_U64 :Ico_U32));
5131 PPCAMode* amCIA = PPCAMode_IR(offsIP, hregPPC_GPR31(env->mode64));
5137 = env->mode64
5142 env->mode64 ? (Addr64)cdst->Ico.U64
5161 PPCAMode* amCIA = PPCAMode_IR(offsIP, hregPPC_GPR31(env->mode64));
5188 PPCAMode* amCIA = PPCAMode_IR(offsIP, hregPPC_GPR31(env->mode64));
5224 Bool mode64 = False;
5230 mode64 = arch_host == VexArchPPC64;
5231 if (!mode64) vassert(max_ga <= 0xFFFFFFFFULL);
5241 if (mode64) {
5252 env->mode64 = mode64;
5269 if (mode64) {
5294 if (mode64) { hregLo = mkHReg(j++, HRcInt64, True); break;
5298 if (mode64) { hregLo = mkHReg(j++, HRcInt64, True); break;
5303 if (mode64) { hregLo = mkHReg(j++, HRcInt64, True);
5322 if (!mode64) {
5330 amCounter = PPCAMode_IR(offs_Host_EvC_Counter, hregPPC_GPR31(mode64));
5331 amFailAddr = PPCAMode_IR(offs_Host_EvC_FailAddr, hregPPC_GPR31(mode64));
