Lines Matching refs:vec0
3284 HReg vec0 = newVRegV(env);3291 addInstr(env, X86Instr_SseReRg(Xsse_XOR, vec0, vec0));3292 addInstr(env, mk_vMOVsd_RR(vec0, vec1));3297 /* vec0 is all 0s; vec1 is all 1s */3300 addInstr(env, X86Instr_SseReRg(cmpOp, vec0, dst));