Lines Matching refs:Rt
1439 void MIPSAssembler::ADDU(int Rd, int Rs, int Rt)
1442 | (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF);
1445 // MD00086 pdf says this is: ADDIU rt, rs, imm -- they do not use Rd
1446 void MIPSAssembler::ADDIU(int Rt, int Rs, int16_t imm)
1448 *mPC++ = (addiu_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16);
1452 void MIPSAssembler::SUBU(int Rd, int Rs, int Rt)
1455 (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF) ;
1459 void MIPSAssembler::SUBIU(int Rt, int Rs, int16_t imm) // really addiu(d, s, -j)
1461 *mPC++ = (addiu_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | ((-imm) & MSK_16);
1470 void MIPSAssembler::MUL(int Rd, int Rs, int Rt)
1473 (Rs<<RS_SHF) | (Rt<<RT_SHF) | (Rd<<RD_SHF) ;
1476 void MIPSAssembler::MULT(int Rs, int Rt) // dest is hi,lo
1478 *mPC++ = (spec_op<<OP_SHF) | (mult_fn<<FUNC_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF);
1481 void MIPSAssembler::MULTU(int Rs, int Rt) // dest is hi,lo
1483 *mPC++ = (spec_op<<OP_SHF) | (multu_fn<<FUNC_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF);
1486 void MIPSAssembler::MADD(int Rs, int Rt) // hi,lo = hi,lo + Rs * Rt
1488 *mPC++ = (spec2_op<<OP_SHF) | (madd_fn<<FUNC_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF);
1491 void MIPSAssembler::MADDU(int Rs, int Rt) // hi,lo = hi,lo + Rs * Rt
1493 *mPC++ = (spec2_op<<OP_SHF) | (maddu_fn<<FUNC_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF);
1497 void MIPSAssembler::MSUB(int Rs, int Rt) // hi,lo = hi,lo - Rs * Rt
1499 *mPC++ = (spec2_op<<OP_SHF) | (msub_fn<<FUNC_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF);
1502 void MIPSAssembler::MSUBU(int Rs, int Rt) // hi,lo = hi,lo - Rs * Rt
1504 *mPC++ = (spec2_op<<OP_SHF) | (msubu_fn<<FUNC_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF);
1508 void MIPSAssembler::SEB(int Rd, int Rt) // sign-extend byte (mips32r2)
1511 (Rt<<RT_SHF) | (Rd<<RD_SHF);
1514 void MIPSAssembler::SEH(int Rd, int Rt) // sign-extend half-word (mips32r2)
1517 (Rt<<RT_SHF) | (Rd<<RD_SHF);
1527 void MIPSAssembler::SLT(int Rd, int Rs, int Rt)
1530 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1533 void MIPSAssembler::SLTI(int Rt, int Rs, int16_t imm)
1535 *mPC++ = (slti_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16);
1539 void MIPSAssembler::SLTU(int Rd, int Rs, int Rt)
1542 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1545 void MIPSAssembler::SLTIU(int Rt, int Rs, int16_t imm)
1547 *mPC++ = (sltiu_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16);
1557 void MIPSAssembler::AND(int Rd, int Rs, int Rt)
1560 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1563 void MIPSAssembler::ANDI(int Rt, int Rs, uint16_t imm) // todo: support larger immediate
1565 *mPC++ = (andi_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16);
1569 void MIPSAssembler::OR(int Rd, int Rs, int Rt)
1572 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1575 void MIPSAssembler::ORI(int Rt, int Rs, uint16_t imm)
1577 *mPC++ = (ori_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16);
1580 void MIPSAssembler::NOR(int Rd, int Rs, int Rt)
1583 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1591 void MIPSAssembler::XOR(int Rd, int Rs, int Rt)
1594 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1597 void MIPSAssembler::XORI(int Rt, int Rs, uint16_t imm) // todo: support larger immediate
1599 *mPC++ = (xori_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | (imm & MSK_16);
1602 void MIPSAssembler::SLL(int Rd, int Rt, int shft)
1605 (Rd<<RD_SHF) | (Rt<<RT_SHF) | (shft<<RE_SHF);
1608 void MIPSAssembler::SLLV(int Rd, int Rt, int Rs)
1611 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1614 void MIPSAssembler::SRL(int Rd, int Rt, int shft)
1617 (Rd<<RD_SHF) | (Rt<<RT_SHF) | (shft<<RE_SHF);
1620 void MIPSAssembler::SRLV(int Rd, int Rt, int Rs)
1623 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1626 void MIPSAssembler::SRA(int Rd, int Rt, int shft)
1629 (Rd<<RD_SHF) | (Rt<<RT_SHF) | (shft<<RE_SHF);
1632 void MIPSAssembler::SRAV(int Rd, int Rt, int Rs)
1635 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1638 void MIPSAssembler::ROTR(int Rd, int Rt, int shft) // mips32r2
1642 (1<<RS_SHF) | (Rd<<RD_SHF) | (Rt<<RT_SHF) | (shft<<RE_SHF);
1645 void MIPSAssembler::ROTRV(int Rd, int Rt, int Rs) // mips32r2
1649 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF) | (1<<RE_SHF);
1653 void MIPSAssembler::RORsyn(int Rd, int Rt, int Rs)
1657 MIPSAssembler::SLLV(R_at2, Rt, R_at2);
1658 MIPSAssembler::SRLV(Rd, Rt, Rs);
1663 void MIPSAssembler::RORIsyn(int Rd, int Rt, int rot)
1667 MIPSAssembler::SLL(R_at2, Rt, 32-rot);
1668 MIPSAssembler::SRL(Rd, Rt, rot);
1674 // Rt field must have same gpr # as Rd
1681 // Rt field must have same gpr # as Rd
1686 void MIPSAssembler::WSBH(int Rd, int Rt) // mips32r2
1689 (Rt<<RT_SHF) | (Rd<<RD_SHF);
1699 void MIPSAssembler::LW(int Rt, int Rbase, int16_t offset)
1701 *mPC++ = (lw_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1704 void MIPSAssembler::SW(int Rt, int Rbase, int16_t offset)
1706 *mPC++ = (sw_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1710 void MIPSAssembler::LB(int Rt, int Rbase, int16_t offset)
1712 *mPC++ = (lb_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1715 void MIPSAssembler::LBU(int Rt, int Rbase, int16_t offset)
1717 *mPC++ = (lbu_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1720 void MIPSAssembler::SB(int Rt, int Rbase, int16_t offset)
1722 *mPC++ = (sb_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1726 void MIPSAssembler::LH(int Rt, int Rbase, int16_t offset)
1728 *mPC++ = (lh_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1731 void MIPSAssembler::LHU(int Rt, int Rbase, int16_t offset)
1733 *mPC++ = (lhu_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1736 void MIPSAssembler::SH(int Rt, int Rbase, int16_t offset)
1738 *mPC++ = (sh_op<<OP_SHF) | (Rbase<<RS_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1741 void MIPSAssembler::LUI(int Rt, int16_t offset)
1743 *mPC++ = (lui_op<<OP_SHF) | (Rt<<RT_SHF) | (offset & MSK_16);
1760 void MIPSAssembler::MOVN(int Rd, int Rs, int Rt)
1763 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1766 void MIPSAssembler::MOVZ(int Rd, int Rs, int Rt)
1769 (Rd<<RD_SHF) | (Rs<<RS_SHF) | (Rt<<RT_SHF);
1812 void MIPSAssembler::BEQ(int Rs, int Rt, const char* label)
1815 *mPC++ = (beq_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | 0;
1819 void MIPSAssembler::BNE(int Rs, int Rt, const char* label)
1822 *mPC++ = (bne_op<<OP_SHF) | (Rt<<RT_SHF) | (Rs<<RS_SHF) | 0;
1878 void MIPSAssembler::BGE(int Rs, int Rt, const char* label)
1880 SLT(R_at, Rs, Rt);
1884 void MIPSAssembler::BGEU(int Rs, int Rt, const char* label)
1886 SLTU(R_at, Rs, Rt);
1890 void MIPSAssembler::BGT(int Rs, int Rt, const char* label)
1892 SLT(R_at, Rt, Rs); // rev
1896 void MIPSAssembler::BGTU(int Rs, int Rt, const char* label)
1898 SLTU(R_at, Rt, Rs); // rev
1902 void MIPSAssembler::BLE(int Rs, int Rt, const char* label)
1904 SLT(R_at, Rt, Rs); // rev
1908 void MIPSAssembler::BLEU(int Rs, int Rt, const char* label)
1910 SLTU(R_at, Rt, Rs); // rev
1914 void MIPSAssembler::BLT(int Rs, int Rt, const char* label)
1916 SLT(R_at, Rs, Rt);
1920 void MIPSAssembler::BLTU(int Rs, int Rt, const char* label)
1922 SLTU(R_at, Rs, Rt);
