1 /****************************************************************************** 2 * 3 * Copyright (C) 1999-2012 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 #ifndef HCIDEFS_H 20 #define HCIDEFS_H 21 22 #define HCI_PROTO_VERSION 0x01 /* Version for BT spec 1.1 */ 23 #define HCI_PROTO_VERSION_1_2 0x02 /* Version for BT spec 1.2 */ 24 #define HCI_PROTO_VERSION_2_0 0x03 /* Version for BT spec 2.0 */ 25 #define HCI_PROTO_VERSION_2_1 0x04 /* Version for BT spec 2.1 [Lisbon] */ 26 #define HCI_PROTO_VERSION_3_0 0x05 /* Version for BT spec 3.0 */ 27 #define HCI_PROTO_REVISION 0x000C /* Current implementation version */ 28 /* 29 ** Definitions for HCI groups 30 */ 31 #define HCI_GRP_LINK_CONTROL_CMDS (0x01 << 10) /* 0x0400 */ 32 #define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) /* 0x0800 */ 33 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) /* 0x0C00 */ 34 #define HCI_GRP_INFORMATIONAL_PARAMS (0x04 << 10) /* 0x1000 */ 35 #define HCI_GRP_STATUS_PARAMS (0x05 << 10) /* 0x1400 */ 36 #define HCI_GRP_TESTING_CMDS (0x06 << 10) /* 0x1800 */ 37 38 #define HCI_GRP_VENDOR_SPECIFIC (0x3F << 10) /* 0xFC00 */ 39 40 /* Group occupies high 6 bits of the HCI command rest is opcode itself */ 41 #define HCI_OGF(p) (UINT8)((0xFC00 & (p)) >> 10) 42 #define HCI_OCF(p) ( 0x3FF & (p)) 43 44 /* 45 ** Defentions for Link Control Commands 46 */ 47 /* Following opcode is used only in command complete event for flow control */ 48 #define HCI_COMMAND_NONE 0x0000 49 50 /* Commands of HCI_GRP_LINK_CONTROL_CMDS group */ 51 #define HCI_INQUIRY (0x0001 | HCI_GRP_LINK_CONTROL_CMDS) 52 #define HCI_INQUIRY_CANCEL (0x0002 | HCI_GRP_LINK_CONTROL_CMDS) 53 #define HCI_PERIODIC_INQUIRY_MODE (0x0003 | HCI_GRP_LINK_CONTROL_CMDS) 54 #define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x0004 | HCI_GRP_LINK_CONTROL_CMDS) 55 #define HCI_CREATE_CONNECTION (0x0005 | HCI_GRP_LINK_CONTROL_CMDS) 56 #define HCI_DISCONNECT (0x0006 | HCI_GRP_LINK_CONTROL_CMDS) 57 #define HCI_ADD_SCO_CONNECTION (0x0007 | HCI_GRP_LINK_CONTROL_CMDS) 58 #define HCI_CREATE_CONNECTION_CANCEL (0x0008 | HCI_GRP_LINK_CONTROL_CMDS) 59 #define HCI_ACCEPT_CONNECTION_REQUEST (0x0009 | HCI_GRP_LINK_CONTROL_CMDS) 60 #define HCI_REJECT_CONNECTION_REQUEST (0x000A | HCI_GRP_LINK_CONTROL_CMDS) 61 #define HCI_LINK_KEY_REQUEST_REPLY (0x000B | HCI_GRP_LINK_CONTROL_CMDS) 62 #define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x000C | HCI_GRP_LINK_CONTROL_CMDS) 63 #define HCI_PIN_CODE_REQUEST_REPLY (0x000D | HCI_GRP_LINK_CONTROL_CMDS) 64 #define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x000E | HCI_GRP_LINK_CONTROL_CMDS) 65 #define HCI_CHANGE_CONN_PACKET_TYPE (0x000F | HCI_GRP_LINK_CONTROL_CMDS) 66 #define HCI_AUTHENTICATION_REQUESTED (0x0011 | HCI_GRP_LINK_CONTROL_CMDS) 67 #define HCI_SET_CONN_ENCRYPTION (0x0013 | HCI_GRP_LINK_CONTROL_CMDS) 68 #define HCI_CHANGE_CONN_LINK_KEY (0x0015 | HCI_GRP_LINK_CONTROL_CMDS) 69 #define HCI_MASTER_LINK_KEY (0x0017 | HCI_GRP_LINK_CONTROL_CMDS) 70 #define HCI_RMT_NAME_REQUEST (0x0019 | HCI_GRP_LINK_CONTROL_CMDS) 71 #define HCI_RMT_NAME_REQUEST_CANCEL (0x001A | HCI_GRP_LINK_CONTROL_CMDS) 72 #define HCI_READ_RMT_FEATURES (0x001B | HCI_GRP_LINK_CONTROL_CMDS) 73 #define HCI_READ_RMT_EXT_FEATURES (0x001C | HCI_GRP_LINK_CONTROL_CMDS) 74 #define HCI_READ_RMT_VERSION_INFO (0x001D | HCI_GRP_LINK_CONTROL_CMDS) 75 #define HCI_READ_RMT_CLOCK_OFFSET (0x001F | HCI_GRP_LINK_CONTROL_CMDS) 76 #define HCI_READ_LMP_HANDLE (0x0020 | HCI_GRP_LINK_CONTROL_CMDS) 77 #define HCI_SETUP_ESCO_CONNECTION (0x0028 | HCI_GRP_LINK_CONTROL_CMDS) 78 #define HCI_ACCEPT_ESCO_CONNECTION (0x0029 | HCI_GRP_LINK_CONTROL_CMDS) 79 #define HCI_REJECT_ESCO_CONNECTION (0x002A | HCI_GRP_LINK_CONTROL_CMDS) 80 #define HCI_IO_CAPABILITY_RESPONSE (0x002B | HCI_GRP_LINK_CONTROL_CMDS) 81 #define HCI_USER_CONF_REQUEST_REPLY (0x002C | HCI_GRP_LINK_CONTROL_CMDS) 82 #define HCI_USER_CONF_VALUE_NEG_REPLY (0x002D | HCI_GRP_LINK_CONTROL_CMDS) 83 #define HCI_USER_PASSKEY_REQ_REPLY (0x002E | HCI_GRP_LINK_CONTROL_CMDS) 84 #define HCI_USER_PASSKEY_REQ_NEG_REPLY (0x002F | HCI_GRP_LINK_CONTROL_CMDS) 85 #define HCI_REM_OOB_DATA_REQ_REPLY (0x0030 | HCI_GRP_LINK_CONTROL_CMDS) 86 #define HCI_REM_OOB_DATA_REQ_NEG_REPLY (0x0033 | HCI_GRP_LINK_CONTROL_CMDS) 87 #define HCI_IO_CAP_REQ_NEG_REPLY (0x0034 | HCI_GRP_LINK_CONTROL_CMDS) 88 89 /* AMP HCI */ 90 #define HCI_CREATE_PHYSICAL_LINK (0x0035 | HCI_GRP_LINK_CONTROL_CMDS) 91 #define HCI_ACCEPT_PHYSICAL_LINK (0x0036 | HCI_GRP_LINK_CONTROL_CMDS) 92 #define HCI_DISCONNECT_PHYSICAL_LINK (0x0037 | HCI_GRP_LINK_CONTROL_CMDS) 93 #define HCI_CREATE_LOGICAL_LINK (0x0038 | HCI_GRP_LINK_CONTROL_CMDS) 94 #define HCI_ACCEPT_LOGICAL_LINK (0x0039 | HCI_GRP_LINK_CONTROL_CMDS) 95 #define HCI_DISCONNECT_LOGICAL_LINK (0x003A | HCI_GRP_LINK_CONTROL_CMDS) 96 #define HCI_LOGICAL_LINK_CANCEL (0x003B | HCI_GRP_LINK_CONTROL_CMDS) 97 #define HCI_FLOW_SPEC_MODIFY (0x003C | HCI_GRP_LINK_CONTROL_CMDS) 98 99 #define HCI_ENH_SETUP_ESCO_CONNECTION (0x003D | HCI_GRP_LINK_CONTROL_CMDS) 100 #define HCI_ENH_ACCEPT_ESCO_CONNECTION (0x003E | HCI_GRP_LINK_CONTROL_CMDS) 101 102 /* ConnectionLess Broadcast */ 103 #define HCI_TRUNCATED_PAGE (0x003F | HCI_GRP_LINK_CONTROL_CMDS) 104 #define HCI_TRUNCATED_PAGE_CANCEL (0x0040 | HCI_GRP_LINK_CONTROL_CMDS) 105 #define HCI_SET_CLB (0x0041 | HCI_GRP_LINK_CONTROL_CMDS) 106 #define HCI_RECEIVE_CLB (0x0042 | HCI_GRP_LINK_CONTROL_CMDS) 107 #define HCI_START_SYNC_TRAIN (0x0043 | HCI_GRP_LINK_CONTROL_CMDS) 108 #define HCI_RECEIVE_SYNC_TRAIN (0x0044 | HCI_GRP_LINK_CONTROL_CMDS) 109 110 #define HCI_LINK_CTRL_CMDS_FIRST HCI_INQUIRY 111 #define HCI_LINK_CTRL_CMDS_LAST HCI_RECEIVE_SYNC_TRAIN 112 113 /* Commands of HCI_GRP_LINK_POLICY_CMDS */ 114 #define HCI_HOLD_MODE (0x0001 | HCI_GRP_LINK_POLICY_CMDS) 115 #define HCI_SNIFF_MODE (0x0003 | HCI_GRP_LINK_POLICY_CMDS) 116 #define HCI_EXIT_SNIFF_MODE (0x0004 | HCI_GRP_LINK_POLICY_CMDS) 117 #define HCI_PARK_MODE (0x0005 | HCI_GRP_LINK_POLICY_CMDS) 118 #define HCI_EXIT_PARK_MODE (0x0006 | HCI_GRP_LINK_POLICY_CMDS) 119 #define HCI_QOS_SETUP (0x0007 | HCI_GRP_LINK_POLICY_CMDS) 120 #define HCI_ROLE_DISCOVERY (0x0009 | HCI_GRP_LINK_POLICY_CMDS) 121 #define HCI_SWITCH_ROLE (0x000B | HCI_GRP_LINK_POLICY_CMDS) 122 #define HCI_READ_POLICY_SETTINGS (0x000C | HCI_GRP_LINK_POLICY_CMDS) 123 #define HCI_WRITE_POLICY_SETTINGS (0x000D | HCI_GRP_LINK_POLICY_CMDS) 124 #define HCI_READ_DEF_POLICY_SETTINGS (0x000E | HCI_GRP_LINK_POLICY_CMDS) 125 #define HCI_WRITE_DEF_POLICY_SETTINGS (0x000F | HCI_GRP_LINK_POLICY_CMDS) 126 #define HCI_FLOW_SPECIFICATION (0x0010 | HCI_GRP_LINK_POLICY_CMDS) 127 #define HCI_SNIFF_SUB_RATE (0x0011 | HCI_GRP_LINK_POLICY_CMDS) 128 129 #define HCI_LINK_POLICY_CMDS_FIRST HCI_HOLD_MODE 130 #define HCI_LINK_POLICY_CMDS_LAST HCI_SNIFF_SUB_RATE 131 132 133 /* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */ 134 #define HCI_SET_EVENT_MASK (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 135 #define HCI_RESET (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 136 #define HCI_SET_EVENT_FILTER (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 137 #define HCI_FLUSH (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 138 #define HCI_READ_PIN_TYPE (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 139 #define HCI_WRITE_PIN_TYPE (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 140 #define HCI_CREATE_NEW_UNIT_KEY (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 141 #define HCI_GET_MWS_TRANS_LAYER_CFG (0x000C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 142 #define HCI_READ_STORED_LINK_KEY (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 143 #define HCI_WRITE_STORED_LINK_KEY (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 144 #define HCI_DELETE_STORED_LINK_KEY (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 145 #define HCI_CHANGE_LOCAL_NAME (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 146 #define HCI_READ_LOCAL_NAME (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 147 #define HCI_READ_CONN_ACCEPT_TOUT (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 148 #define HCI_WRITE_CONN_ACCEPT_TOUT (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 149 #define HCI_READ_PAGE_TOUT (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 150 #define HCI_WRITE_PAGE_TOUT (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 151 #define HCI_READ_SCAN_ENABLE (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 152 #define HCI_WRITE_SCAN_ENABLE (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 153 #define HCI_READ_PAGESCAN_CFG (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 154 #define HCI_WRITE_PAGESCAN_CFG (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 155 #define HCI_READ_INQUIRYSCAN_CFG (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 156 #define HCI_WRITE_INQUIRYSCAN_CFG (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 157 #define HCI_READ_AUTHENTICATION_ENABLE (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 158 #define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 159 #define HCI_READ_ENCRYPTION_MODE (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 160 #define HCI_WRITE_ENCRYPTION_MODE (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 161 #define HCI_READ_CLASS_OF_DEVICE (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 162 #define HCI_WRITE_CLASS_OF_DEVICE (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 163 #define HCI_READ_VOICE_SETTINGS (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 164 #define HCI_WRITE_VOICE_SETTINGS (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 165 #define HCI_READ_AUTO_FLUSH_TOUT (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 166 #define HCI_WRITE_AUTO_FLUSH_TOUT (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 167 #define HCI_READ_NUM_BCAST_REXMITS (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 168 #define HCI_WRITE_NUM_BCAST_REXMITS (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 169 #define HCI_READ_HOLD_MODE_ACTIVITY (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 170 #define HCI_WRITE_HOLD_MODE_ACTIVITY (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 171 #define HCI_READ_TRANSMIT_POWER_LEVEL (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 172 #define HCI_READ_SCO_FLOW_CTRL_ENABLE (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 173 #define HCI_WRITE_SCO_FLOW_CTRL_ENABLE (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 174 #define HCI_SET_HC_TO_HOST_FLOW_CTRL (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 175 #define HCI_HOST_BUFFER_SIZE (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 176 #define HCI_HOST_NUM_PACKETS_DONE (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 177 #define HCI_READ_LINK_SUPER_TOUT (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 178 #define HCI_WRITE_LINK_SUPER_TOUT (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 179 #define HCI_READ_NUM_SUPPORTED_IAC (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 180 #define HCI_READ_CURRENT_IAC_LAP (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 181 #define HCI_WRITE_CURRENT_IAC_LAP (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 182 #define HCI_READ_PAGESCAN_PERIOD_MODE (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 183 #define HCI_WRITE_PAGESCAN_PERIOD_MODE (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 184 #define HCI_READ_PAGESCAN_MODE (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 185 #define HCI_WRITE_PAGESCAN_MODE (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 186 #define HCI_SET_AFH_CHANNELS (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 187 188 #define HCI_READ_INQSCAN_TYPE (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 189 #define HCI_WRITE_INQSCAN_TYPE (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 190 #define HCI_READ_INQUIRY_MODE (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 191 #define HCI_WRITE_INQUIRY_MODE (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 192 #define HCI_READ_PAGESCAN_TYPE (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 193 #define HCI_WRITE_PAGESCAN_TYPE (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 194 #define HCI_READ_AFH_ASSESSMENT_MODE (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 195 #define HCI_WRITE_AFH_ASSESSMENT_MODE (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 196 #define HCI_READ_EXT_INQ_RESPONSE (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 197 #define HCI_WRITE_EXT_INQ_RESPONSE (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 198 #define HCI_REFRESH_ENCRYPTION_KEY (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 199 #define HCI_READ_SIMPLE_PAIRING_MODE (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 200 #define HCI_WRITE_SIMPLE_PAIRING_MODE (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 201 #define HCI_READ_LOCAL_OOB_DATA (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 202 #define HCI_READ_INQ_TX_POWER_LEVEL (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 203 #define HCI_WRITE_INQ_TX_POWER_LEVEL (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 204 #define HCI_READ_ERRONEOUS_DATA_RPT (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 205 #define HCI_WRITE_ERRONEOUS_DATA_RPT (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 206 #define HCI_ENHANCED_FLUSH (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 207 #define HCI_SEND_KEYPRESS_NOTIF (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 208 209 210 /* AMP HCI */ 211 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 212 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 213 #define HCI_SET_EVENT_MASK_PAGE_2 (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 214 #define HCI_READ_LOCATION_DATA (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 215 #define HCI_WRITE_LOCATION_DATA (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 216 #define HCI_READ_FLOW_CONTROL_MODE (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 217 #define HCI_WRITE_FLOW_CONTROL_MODE (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 218 #define HCI_READ_BE_FLUSH_TOUT (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 219 #define HCI_WRITE_BE_FLUSH_TOUT (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 220 #define HCI_SHORT_RANGE_MODE (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) /* 802.11 only */ 221 #define HCI_READ_LE_HOST_SUPPORTED (0x006C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 222 #define HCI_WRITE_LE_HOST_SUPPORTED (0x006D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 223 224 225 /* MWS coexistence */ 226 #define HCI_SET_MWS_CHANNEL_PARAMETERS (0x006E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 227 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION (0x006F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 228 #define HCI_SET_MWS_SIGNALING (0x0070 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 229 #define HCI_SET_MWS_TRANSPORT_LAYER (0x0071 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 230 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE (0x0072 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 231 #define HCI_SET_MWS_PATTERN_CONFIGURATION (0x0073 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 232 233 /* ConnectionLess Broadcast */ 234 #define HCI_SET_RESERVED_LT_ADDR (0x0077 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 235 #define HCI_DELETE_RESERVED_LT_ADDR (0x0078 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 236 #define HCI_WRITE_CLB_DATA (0x0079 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 237 #define HCI_WRITE_SYNC_TRAIN_PARAM (0x007A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 238 #define HCI_READ_SYNC_TRAIN_PARAM (0x007B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 239 240 #define HCI_CONT_BASEBAND_CMDS_FIRST HCI_SET_EVENT_MASK 241 #define HCI_CONT_BASEBAND_CMDS_LAST HCI_READ_SYNC_TRAIN_PARAM 242 243 244 /* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */ 245 #define HCI_READ_LOCAL_VERSION_INFO (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS) 246 #define HCI_READ_LOCAL_SUPPORTED_CMDS (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS) 247 #define HCI_READ_LOCAL_FEATURES (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS) 248 #define HCI_READ_LOCAL_EXT_FEATURES (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS) 249 #define HCI_READ_BUFFER_SIZE (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS) 250 #define HCI_READ_COUNTRY_CODE (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS) 251 #define HCI_READ_BD_ADDR (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS) 252 #define HCI_READ_DATA_BLOCK_SIZE (0x000A | HCI_GRP_INFORMATIONAL_PARAMS) 253 #define HCI_READ_LOCAL_SUPPORTED_CODECS (0x000B | HCI_GRP_INFORMATIONAL_PARAMS) 254 255 #define HCI_INFORMATIONAL_CMDS_FIRST HCI_READ_LOCAL_VERSION_INFO 256 #define HCI_INFORMATIONAL_CMDS_LAST HCI_READ_LOCAL_SUPPORTED_CODECS 257 258 259 /* Commands of HCI_GRP_STATUS_PARAMS group */ 260 #define HCI_READ_FAILED_CONTACT_COUNT (0x0001 | HCI_GRP_STATUS_PARAMS) 261 #define HCI_RESET_FAILED_CONTACT_COUNT (0x0002 | HCI_GRP_STATUS_PARAMS) 262 #define HCI_GET_LINK_QUALITY (0x0003 | HCI_GRP_STATUS_PARAMS) 263 #define HCI_READ_RSSI (0x0005 | HCI_GRP_STATUS_PARAMS) 264 #define HCI_READ_AFH_CH_MAP (0x0006 | HCI_GRP_STATUS_PARAMS) 265 #define HCI_READ_CLOCK (0x0007 | HCI_GRP_STATUS_PARAMS) 266 #define HCI_READ_ENCR_KEY_SIZE (0x0008 | HCI_GRP_STATUS_PARAMS) 267 268 /* AMP HCI */ 269 #define HCI_READ_LOCAL_AMP_INFO (0x0009 | HCI_GRP_STATUS_PARAMS) 270 #define HCI_READ_LOCAL_AMP_ASSOC (0x000A | HCI_GRP_STATUS_PARAMS) 271 #define HCI_WRITE_REMOTE_AMP_ASSOC (0x000B | HCI_GRP_STATUS_PARAMS) 272 273 #define HCI_STATUS_PARAMS_CMDS_FIRST HCI_READ_FAILED_CONTACT_COUNT 274 #define HCI_STATUS_PARAMS_CMDS_LAST HCI_WRITE_REMOTE_AMP_ASSOC 275 276 /* Commands of HCI_GRP_TESTING_CMDS group */ 277 #define HCI_READ_LOOPBACK_MODE (0x0001 | HCI_GRP_TESTING_CMDS) 278 #define HCI_WRITE_LOOPBACK_MODE (0x0002 | HCI_GRP_TESTING_CMDS) 279 #define HCI_ENABLE_DEV_UNDER_TEST_MODE (0x0003 | HCI_GRP_TESTING_CMDS) 280 #define HCI_WRITE_SIMP_PAIR_DEBUG_MODE (0x0004 | HCI_GRP_TESTING_CMDS) 281 282 /* AMP HCI */ 283 #define HCI_ENABLE_AMP_RCVR_REPORTS (0x0007 | HCI_GRP_TESTING_CMDS) 284 #define HCI_AMP_TEST_END (0x0008 | HCI_GRP_TESTING_CMDS) 285 #define HCI_AMP_TEST (0x0009 | HCI_GRP_TESTING_CMDS) 286 287 #define HCI_TESTING_CMDS_FIRST HCI_READ_LOOPBACK_MODE 288 #define HCI_TESTING_CMDS_LAST HCI_AMP_TEST 289 290 #define HCI_VENDOR_CMDS_FIRST 0x0001 291 #define HCI_VENDOR_CMDS_LAST 0xFFFF 292 #define HCI_VSC_MULTI_AV_HANDLE 0x0AAA 293 #define HCI_VSC_BURST_MODE_HANDLE 0x0BBB 294 295 /* BLE HCI */ 296 #define HCI_GRP_BLE_CMDS (0x08 << 10) 297 /* Commands of BLE Controller setup and configuration */ 298 #define HCI_BLE_SET_EVENT_MASK (0x0001 | HCI_GRP_BLE_CMDS) 299 #define HCI_BLE_READ_BUFFER_SIZE (0x0002 | HCI_GRP_BLE_CMDS) 300 #define HCI_BLE_READ_LOCAL_SPT_FEAT (0x0003 | HCI_GRP_BLE_CMDS) 301 #define HCI_BLE_WRITE_LOCAL_SPT_FEAT (0x0004 | HCI_GRP_BLE_CMDS) 302 #define HCI_BLE_WRITE_RANDOM_ADDR (0x0005 | HCI_GRP_BLE_CMDS) 303 #define HCI_BLE_WRITE_ADV_PARAMS (0x0006 | HCI_GRP_BLE_CMDS) 304 #define HCI_BLE_READ_ADV_CHNL_TX_POWER (0x0007 | HCI_GRP_BLE_CMDS) 305 #define HCI_BLE_WRITE_ADV_DATA (0x0008 | HCI_GRP_BLE_CMDS) 306 #define HCI_BLE_WRITE_SCAN_RSP_DATA (0x0009 | HCI_GRP_BLE_CMDS) 307 #define HCI_BLE_WRITE_ADV_ENABLE (0x000A | HCI_GRP_BLE_CMDS) 308 #define HCI_BLE_WRITE_SCAN_PARAMS (0x000B | HCI_GRP_BLE_CMDS) 309 #define HCI_BLE_WRITE_SCAN_ENABLE (0x000C | HCI_GRP_BLE_CMDS) 310 #define HCI_BLE_CREATE_LL_CONN (0x000D | HCI_GRP_BLE_CMDS) 311 #define HCI_BLE_CREATE_CONN_CANCEL (0x000E | HCI_GRP_BLE_CMDS) 312 #define HCI_BLE_READ_WHITE_LIST_SIZE (0x000F | HCI_GRP_BLE_CMDS) 313 #define HCI_BLE_CLEAR_WHITE_LIST (0x0010 | HCI_GRP_BLE_CMDS) 314 #define HCI_BLE_ADD_WHITE_LIST (0x0011 | HCI_GRP_BLE_CMDS) 315 #define HCI_BLE_REMOVE_WHITE_LIST (0x0012 | HCI_GRP_BLE_CMDS) 316 #define HCI_BLE_UPD_LL_CONN_PARAMS (0x0013 | HCI_GRP_BLE_CMDS) 317 #define HCI_BLE_SET_HOST_CHNL_CLASS (0x0014 | HCI_GRP_BLE_CMDS) 318 #define HCI_BLE_READ_CHNL_MAP (0x0015 | HCI_GRP_BLE_CMDS) 319 #define HCI_BLE_READ_REMOTE_FEAT (0x0016 | HCI_GRP_BLE_CMDS) 320 #define HCI_BLE_ENCRYPT (0x0017 | HCI_GRP_BLE_CMDS) 321 #define HCI_BLE_RAND (0x0018 | HCI_GRP_BLE_CMDS) 322 #define HCI_BLE_START_ENC (0x0019 | HCI_GRP_BLE_CMDS) 323 #define HCI_BLE_LTK_REQ_REPLY (0x001A | HCI_GRP_BLE_CMDS) 324 #define HCI_BLE_LTK_REQ_NEG_REPLY (0x001B | HCI_GRP_BLE_CMDS) 325 #define HCI_BLE_READ_SUPPORTED_STATES (0x001C | HCI_GRP_BLE_CMDS) 326 /* BLE TEST COMMANDS */ 327 #define HCI_BLE_RECEIVER_TEST (0x001D | HCI_GRP_BLE_CMDS) 328 #define HCI_BLE_TRANSMITTER_TEST (0x001E | HCI_GRP_BLE_CMDS) 329 #define HCI_BLE_TEST_END (0x001F | HCI_GRP_BLE_CMDS) 330 331 #define HCI_BLE_RESET (0x0020 | HCI_GRP_BLE_CMDS) 332 333 /* LE supported states definition */ 334 #define HCI_LE_ADV_STATE 0x00000001 335 #define HCI_LE_SCAN_STATE 0x00000002 336 #define HCI_LE_INIT_STATE 0x00000004 337 #define HCI_LE_CONN_SL_STATE 0x00000008 338 #define HCI_LE_ADV_SCAN_STATE 0x00000010 339 #define HCI_LE_ADV_INIT_STATE 0x00000020 340 #define HCI_LE_ADV_MA_STATE 0x00000040 341 #define HCI_LE_ADV_SL_STATE 0x00000080 342 #define HCI_LE_SCAN_INIT_STATE 0x00000100 343 #define HCI_LE_SCAN_MA_STATE 0x00000200 344 #define HCI_LE_SCAN_SL_STATE 0x00000400 345 #define HCI_LE_INIT_MA_STATE 0x00000800 346 347 /* 348 ** Definitions for HCI Events 349 */ 350 #define HCI_INQUIRY_COMP_EVT 0x01 351 #define HCI_INQUIRY_RESULT_EVT 0x02 352 #define HCI_CONNECTION_COMP_EVT 0x03 353 #define HCI_CONNECTION_REQUEST_EVT 0x04 354 #define HCI_DISCONNECTION_COMP_EVT 0x05 355 #define HCI_AUTHENTICATION_COMP_EVT 0x06 356 #define HCI_RMT_NAME_REQUEST_COMP_EVT 0x07 357 #define HCI_ENCRYPTION_CHANGE_EVT 0x08 358 #define HCI_CHANGE_CONN_LINK_KEY_EVT 0x09 359 #define HCI_MASTER_LINK_KEY_COMP_EVT 0x0A 360 #define HCI_READ_RMT_FEATURES_COMP_EVT 0x0B 361 #define HCI_READ_RMT_VERSION_COMP_EVT 0x0C 362 #define HCI_QOS_SETUP_COMP_EVT 0x0D 363 #define HCI_COMMAND_COMPLETE_EVT 0x0E 364 #define HCI_COMMAND_STATUS_EVT 0x0F 365 #define HCI_HARDWARE_ERROR_EVT 0x10 366 #define HCI_FLUSH_OCCURED_EVT 0x11 367 #define HCI_ROLE_CHANGE_EVT 0x12 368 #define HCI_NUM_COMPL_DATA_PKTS_EVT 0x13 369 #define HCI_MODE_CHANGE_EVT 0x14 370 #define HCI_RETURN_LINK_KEYS_EVT 0x15 371 #define HCI_PIN_CODE_REQUEST_EVT 0x16 372 #define HCI_LINK_KEY_REQUEST_EVT 0x17 373 #define HCI_LINK_KEY_NOTIFICATION_EVT 0x18 374 #define HCI_LOOPBACK_COMMAND_EVT 0x19 375 #define HCI_DATA_BUF_OVERFLOW_EVT 0x1A 376 #define HCI_MAX_SLOTS_CHANGED_EVT 0x1B 377 #define HCI_READ_CLOCK_OFF_COMP_EVT 0x1C 378 #define HCI_CONN_PKT_TYPE_CHANGE_EVT 0x1D 379 #define HCI_QOS_VIOLATION_EVT 0x1E 380 #define HCI_PAGE_SCAN_MODE_CHANGE_EVT 0x1F 381 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT 0x20 382 #define HCI_FLOW_SPECIFICATION_COMP_EVT 0x21 383 #define HCI_INQUIRY_RSSI_RESULT_EVT 0x22 384 #define HCI_READ_RMT_EXT_FEATURES_COMP_EVT 0x23 385 #define HCI_ESCO_CONNECTION_COMP_EVT 0x2C 386 #define HCI_ESCO_CONNECTION_CHANGED_EVT 0x2D 387 #define HCI_SNIFF_SUB_RATE_EVT 0x2E 388 #define HCI_EXTENDED_INQUIRY_RESULT_EVT 0x2F 389 #define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30 390 #define HCI_IO_CAPABILITY_REQUEST_EVT 0x31 391 #define HCI_IO_CAPABILITY_RESPONSE_EVT 0x32 392 #define HCI_USER_CONFIRMATION_REQUEST_EVT 0x33 393 #define HCI_USER_PASSKEY_REQUEST_EVT 0x34 394 #define HCI_REMOTE_OOB_DATA_REQUEST_EVT 0x35 395 #define HCI_SIMPLE_PAIRING_COMPLETE_EVT 0x36 396 #define HCI_LINK_SUPER_TOUT_CHANGED_EVT 0x38 397 #define HCI_ENHANCED_FLUSH_COMPLETE_EVT 0x39 398 #define HCI_USER_PASSKEY_NOTIFY_EVT 0x3B 399 #define HCI_KEYPRESS_NOTIFY_EVT 0x3C 400 #define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT 0x3D 401 402 /*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT 0x3E Removed from spec */ 403 #define HCI_PHYSICAL_LINK_COMP_EVT 0x40 404 #define HCI_CHANNEL_SELECTED_EVT 0x41 405 #define HCI_DISC_PHYSICAL_LINK_COMP_EVT 0x42 406 #define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43 407 #define HCI_PHY_LINK_RECOVERY_EVT 0x44 408 #define HCI_LOGICAL_LINK_COMP_EVT 0x45 409 #define HCI_DISC_LOGICAL_LINK_COMP_EVT 0x46 410 #define HCI_FLOW_SPEC_MODIFY_COMP_EVT 0x47 411 #define HCI_NUM_COMPL_DATA_BLOCKS_EVT 0x48 412 #define HCI_SHORT_RANGE_MODE_COMPLETE_EVT 0x4C 413 #define HCI_AMP_STATUS_CHANGE_EVT 0x4D 414 415 /* ULP HCI Event */ 416 #define HCI_BLE_EVENT 0x03E 417 /* ULP Event sub code */ 418 #define HCI_BLE_CONN_COMPLETE_EVT 0x01 419 #define HCI_BLE_ADV_PKT_RPT_EVT 0x02 420 #define HCI_BLE_LL_CONN_PARAM_UPD_EVT 0x03 421 #define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT 0x04 422 #define HCI_BLE_LTK_REQ_EVT 0x05 423 424 /* ConnectionLess Broadcast events */ 425 #define HCI_SYNC_TRAIN_COMP_EVT 0x4F 426 #define HCI_SYNC_TRAIN_RECEIVED_EVT 0x50 427 #define HCI_CLB_RX_DATA_EVT 0x51 428 #define HCI_CLB_RX_TIMEOUT_EVT 0x52 429 #define HCI_TRUNCATED_PAGE_COMP_EVT 0x53 430 #define HCI_SLAVE_PAGE_RESP_TIMEOUT_EVT 0x54 431 #define HCI_CLB_CHANNEL_CHANGE_EVT 0x55 432 #define HCI_INQUIRY_RESPONSE_NOTIF 0x56 433 434 #define HCI_EVENT_RSP_FIRST HCI_INQUIRY_COMP_EVT 435 #define HCI_EVENT_RSP_LAST HCI_CLB_CHANNEL_CHANGE_EVT 436 437 #define HCI_VENDOR_SPECIFIC_EVT 0xFF /* Vendor specific events */ 438 #define HCI_NAP_TRACE_EVT 0xFF /* was define 0xFE, 0xFD, change to 0xFF 439 because conflict w/ TCI_EVT and per 440 specification compliant */ 441 442 443 444 /* 445 ** Defentions for HCI Error Codes that are past in the events 446 */ 447 #define HCI_SUCCESS 0x00 448 #define HCI_PENDING 0x00 449 #define HCI_ERR_ILLEGAL_COMMAND 0x01 450 #define HCI_ERR_NO_CONNECTION 0x02 451 #define HCI_ERR_HW_FAILURE 0x03 452 #define HCI_ERR_PAGE_TIMEOUT 0x04 453 #define HCI_ERR_AUTH_FAILURE 0x05 454 #define HCI_ERR_KEY_MISSING 0x06 455 #define HCI_ERR_MEMORY_FULL 0x07 456 #define HCI_ERR_CONNECTION_TOUT 0x08 457 #define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 458 #define HCI_ERR_MAX_NUM_OF_SCOS 0x0A 459 #define HCI_ERR_CONNECTION_EXISTS 0x0B 460 #define HCI_ERR_COMMAND_DISALLOWED 0x0C 461 #define HCI_ERR_HOST_REJECT_RESOURCES 0x0D 462 #define HCI_ERR_HOST_REJECT_SECURITY 0x0E 463 #define HCI_ERR_HOST_REJECT_DEVICE 0x0F 464 #define HCI_ERR_HOST_TIMEOUT 0x10 465 #define HCI_ERR_UNSUPPORTED_VALUE 0x11 466 #define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 467 #define HCI_ERR_PEER_USER 0x13 468 #define HCI_ERR_PEER_LOW_RESOURCES 0x14 469 #define HCI_ERR_PEER_POWER_OFF 0x15 470 #define HCI_ERR_CONN_CAUSE_LOCAL_HOST 0x16 471 #define HCI_ERR_REPEATED_ATTEMPTS 0x17 472 #define HCI_ERR_PAIRING_NOT_ALLOWED 0x18 473 #define HCI_ERR_UNKNOWN_LMP_PDU 0x19 474 #define HCI_ERR_UNSUPPORTED_REM_FEATURE 0x1A 475 #define HCI_ERR_SCO_OFFSET_REJECTED 0x1B 476 #define HCI_ERR_SCO_INTERVAL_REJECTED 0x1C 477 #define HCI_ERR_SCO_AIR_MODE 0x1D 478 #define HCI_ERR_INVALID_LMP_PARAM 0x1E 479 #define HCI_ERR_UNSPECIFIED 0x1F 480 #define HCI_ERR_UNSUPPORTED_LMP_FEATURE 0x20 481 #define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED 0x21 482 #define HCI_ERR_LMP_RESPONSE_TIMEOUT 0x22 483 #define HCI_ERR_LMP_ERR_TRANS_COLLISION 0x23 484 #define HCI_ERR_LMP_PDU_NOT_ALLOWED 0x24 485 #define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE 0x25 486 #define HCI_ERR_UNIT_KEY_USED 0x26 487 #define HCI_ERR_QOS_NOT_SUPPORTED 0x27 488 #define HCI_ERR_INSTANT_PASSED 0x28 489 #define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED 0x29 490 #define HCI_ERR_DIFF_TRANSACTION_COLLISION 0x2A 491 #define HCI_ERR_UNDEFINED_0x2B 0x2B 492 #define HCI_ERR_QOS_UNACCEPTABLE_PARAM 0x2C 493 #define HCI_ERR_QOS_REJECTED 0x2D 494 #define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED 0x2E 495 #define HCI_ERR_INSUFFCIENT_SECURITY 0x2F 496 #define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 497 #define HCI_ERR_UNDEFINED_0x31 0x31 498 #define HCI_ERR_ROLE_SWITCH_PENDING 0x32 499 #define HCI_ERR_UNDEFINED_0x33 0x33 500 #define HCI_ERR_RESERVED_SLOT_VIOLATION 0x34 501 #define HCI_ERR_ROLE_SWITCH_FAILED 0x35 502 #define HCI_ERR_INQ_RSP_DATA_TOO_LARGE 0x36 503 #define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED 0x37 504 #define HCI_ERR_HOST_BUSY_PAIRING 0x38 505 #define HCI_ERR_REJ_NO_SUITABLE_CHANNEL 0x39 506 #define HCI_ERR_CONTROLLER_BUSY 0x3A 507 #define HCI_ERR_UNACCEPT_CONN_INTERVAL 0x3B 508 #define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT 0x3C 509 #define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE 0x3D 510 #define HCI_ERR_CONN_FAILED_ESTABLISHMENT 0x3E 511 #define HCI_ERR_MAC_CONNECTION_FAILED 0x3F 512 513 /* ConnectionLess Broadcast errors */ 514 #define HCI_ERR_LT_ADDR_ALREADY_IN_USE 0x40 515 #define HCI_ERR_LT_ADDR_NOT_ALLOCATED 0x41 516 #define HCI_ERR_CLB_NOT_ENABLED 0x42 517 #define HCI_ERR_CLB_DATA_TOO_BIG 0x43 518 519 #define HCI_ERR_MAX_ERR 0x43 520 521 #define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK 0xFF 522 523 /* 524 ** Definitions for HCI enable event 525 */ 526 #define HCI_INQUIRY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000001) 527 #define HCI_INQUIRY_RESULT_EV(p) (*((UINT32 *)(p)) & 0x00000002) 528 #define HCI_CONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000004) 529 #define HCI_CONNECTION_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00000008) 530 #define HCI_DISCONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000010) 531 #define HCI_AUTHENTICATION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000020) 532 #define HCI_RMT_NAME_REQUEST_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000040) 533 #define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((UINT32 *)(p)) & 0x00000080) 534 #define HCI_CHANGE_CONN_LINK_KEY_EV(p) (*((UINT32 *)(p)) & 0x00000100) 535 #define HCI_MASTER_LINK_KEY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000200) 536 #define HCI_READ_RMT_FEATURES_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000400) 537 #define HCI_READ_RMT_VERSION_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000800) 538 #define HCI_QOS_SETUP_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00001000) 539 #define HCI_COMMAND_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00002000) 540 #define HCI_COMMAND_STATUS_EV(p) (*((UINT32 *)(p)) & 0x00004000) 541 #define HCI_HARDWARE_ERROR_EV(p) (*((UINT32 *)(p)) & 0x00008000) 542 #define HCI_FLASH_OCCURED_EV(p) (*((UINT32 *)(p)) & 0x00010000) 543 #define HCI_ROLE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00020000) 544 #define HCI_NUM_COMPLETED_PKTS_EV(p) (*((UINT32 *)(p)) & 0x00040000) 545 #define HCI_MODE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00080000) 546 #define HCI_RETURN_LINK_KEYS_EV(p) (*((UINT32 *)(p)) & 0x00100000) 547 #define HCI_PIN_CODE_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00200000) 548 #define HCI_LINK_KEY_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00400000) 549 #define HCI_LINK_KEY_NOTIFICATION_EV(p) (*((UINT32 *)(p)) & 0x00800000) 550 #define HCI_LOOPBACK_COMMAND_EV(p) (*((UINT32 *)(p)) & 0x01000000) 551 #define HCI_DATA_BUF_OVERFLOW_EV(p) (*((UINT32 *)(p)) & 0x02000000) 552 #define HCI_MAX_SLOTS_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x04000000) 553 #define HCI_READ_CLOCK_OFFSET_COMP_EV(p) (*((UINT32 *)(p)) & 0x08000000) 554 #define HCI_CONN_PKT_TYPE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x10000000) 555 #define HCI_QOS_VIOLATION_EV(p) (*((UINT32 *)(p)) & 0x20000000) 556 #define HCI_PAGE_SCAN_MODE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x40000000) 557 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p) (*((UINT32 *)(p)) & 0x80000000) 558 559 /* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */ 560 #define HCI_DEFAULT_EVENT_MASK_0 0xFFFFFFFF 561 #define HCI_DEFAULT_EVENT_MASK_1 0x00001FFF 562 563 /* the event mask for 2.0 + EDR and later (includes Lisbon events) */ 564 #define HCI_LISBON_EVENT_MASK_0 0xFFFFFFFF 565 #define HCI_LISBON_EVENT_MASK_1 0x1DBFFFFF 566 #define HCI_LISBON_EVENT_MASK "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 567 #define HCI_LISBON_EVENT_MASK_EXT "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 568 #define HCI_DUMO_EVENT_MASK_EXT "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 569 /* 0x00001FFF FFFFFFFF Default - no Lisbon events 570 0x00000800 00000000 Synchronous Connection Complete Event 571 0x00001000 00000000 Synchronous Connection Changed Event 572 0x00002000 00000000 Sniff Subrate Event 573 0x00004000 00000000 Extended Inquiry Result Event 574 0x00008000 00000000 Encryption Key Refresh Complete Event 575 0x00010000 00000000 IO Capability Request Event 576 0x00020000 00000000 IO Capability Response Event 577 0x00040000 00000000 User Confirmation Request Event 578 0x00080000 00000000 User Passkey Request Event 579 0x00100000 00000000 Remote OOB Data Request Event 580 0x00200000 00000000 Simple Pairing Complete Event 581 0x00400000 00000000 Generic AMP Link Key Notification Event 582 0x00800000 00000000 Link Supervision Timeout Changed Event 583 0x01000000 00000000 Enhanced Flush Complete Event 584 0x04000000 00000000 User Passkey Notification Event 585 0x08000000 00000000 Keypress Notification Event 586 0x10000000 00000000 Remote Host Supported Features Notification Event 587 0x20000000 00000000 LE Meta Event 588 */ 589 590 591 /* the event mask for AMP controllers */ 592 #define HCI_AMP_EVENT_MASK_3_0 "\x00\x00\x00\x00\x00\x00\x3F\xFF" 593 594 /* 0x0000000000000000 No events specified (default) 595 0x0000000000000001 Physical Link Complete Event 596 0x0000000000000002 Channel Selected Event 597 0x0000000000000004 Disconnection Physical Link Event 598 0x0000000000000008 Physical Link Loss Early Warning Event 599 0x0000000000000010 Physical Link Recovery Event 600 0x0000000000000020 Logical Link Complete Event 601 0x0000000000000040 Disconnection Logical Link Complete Event 602 0x0000000000000080 Flow Spec Modify Complete Event 603 0x0000000000000100 Number of Completed Data Blocks Event 604 0x0000000000000200 AMP Start Test Event 605 0x0000000000000400 AMP Test End Event 606 0x0000000000000800 AMP Receiver Report Event 607 0x0000000000001000 Short Range Mode Change Complete Event 608 0x0000000000002000 AMP Status Change Event 609 */ 610 611 /* the event mask page 2 (CLB + CSA4) for BR/EDR controller */ 612 #define HCI_PAGE_2_EVENT_MASK "\x00\x00\x00\x00\x00\x7F\xC0\x00" 613 /* 0x0000000000004000 Triggered Clock Capture Event 614 0x0000000000008000 Sync Train Complete Event 615 0x0000000000010000 Sync Train Received Event 616 0x0000000000020000 Connectionless Broadcast Receive Event 617 0x0000000000040000 Connectionless Broadcast Timeout Event 618 0x0000000000080000 Truncated Page Complete Event 619 0x0000000000100000 Salve Page Response Timeout Event 620 0x0000000000200000 Connectionless Broadcast Channel Map Change Event 621 0x0000000000400000 Inquiry Response Notification Event 622 */ 623 624 /* 625 ** Definitions for packet type masks (BT1.2 and BT2.0 definitions) 626 */ 627 #define HCI_PKT_TYPES_MASK_NO_2_DH1 0x0002 628 #define HCI_PKT_TYPES_MASK_NO_3_DH1 0x0004 629 #define HCI_PKT_TYPES_MASK_DM1 0x0008 630 #define HCI_PKT_TYPES_MASK_DH1 0x0010 631 #define HCI_PKT_TYPES_MASK_HV1 0x0020 632 #define HCI_PKT_TYPES_MASK_HV2 0x0040 633 #define HCI_PKT_TYPES_MASK_HV3 0x0080 634 #define HCI_PKT_TYPES_MASK_NO_2_DH3 0x0100 635 #define HCI_PKT_TYPES_MASK_NO_3_DH3 0x0200 636 #define HCI_PKT_TYPES_MASK_DM3 0x0400 637 #define HCI_PKT_TYPES_MASK_DH3 0x0800 638 #define HCI_PKT_TYPES_MASK_NO_2_DH5 0x1000 639 #define HCI_PKT_TYPES_MASK_NO_3_DH5 0x2000 640 #define HCI_PKT_TYPES_MASK_DM5 0x4000 641 #define HCI_PKT_TYPES_MASK_DH5 0x8000 642 643 /* Packet type should be one of valid but at least one should be specified */ 644 #define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1 \ 645 | HCI_PKT_TYPES_MASK_HV2 \ 646 | HCI_PKT_TYPES_MASK_HV3)) == 0)) \ 647 && ((t) != 0)) 648 649 650 651 652 653 /* Packet type should not be invalid and at least one should be specified */ 654 #define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1 \ 655 | HCI_PKT_TYPES_MASK_DH1 \ 656 | HCI_PKT_TYPES_MASK_DM3 \ 657 | HCI_PKT_TYPES_MASK_DH3 \ 658 | HCI_PKT_TYPES_MASK_DM5 \ 659 | HCI_PKT_TYPES_MASK_DH5 \ 660 | HCI_PKT_TYPES_MASK_NO_2_DH1 \ 661 | HCI_PKT_TYPES_MASK_NO_3_DH1 \ 662 | HCI_PKT_TYPES_MASK_NO_2_DH3 \ 663 | HCI_PKT_TYPES_MASK_NO_3_DH3 \ 664 | HCI_PKT_TYPES_MASK_NO_2_DH5 \ 665 | HCI_PKT_TYPES_MASK_NO_3_DH5 )) == 0)) \ 666 && (((t) & (HCI_PKT_TYPES_MASK_DM1 \ 667 | HCI_PKT_TYPES_MASK_DH1 \ 668 | HCI_PKT_TYPES_MASK_DM3 \ 669 | HCI_PKT_TYPES_MASK_DH3 \ 670 | HCI_PKT_TYPES_MASK_DM5 \ 671 | HCI_PKT_TYPES_MASK_DH5)) != 0)) 672 673 /* 674 ** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions) 675 */ 676 #define HCI_ESCO_PKT_TYPES_MASK_HV1 0x0001 677 #define HCI_ESCO_PKT_TYPES_MASK_HV2 0x0002 678 #define HCI_ESCO_PKT_TYPES_MASK_HV3 0x0004 679 #define HCI_ESCO_PKT_TYPES_MASK_EV3 0x0008 680 #define HCI_ESCO_PKT_TYPES_MASK_EV4 0x0010 681 #define HCI_ESCO_PKT_TYPES_MASK_EV5 0x0020 682 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3 0x0040 683 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3 0x0080 684 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5 0x0100 685 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5 0x0200 686 687 /* Packet type should be one of valid but at least one should be specified for 1.2 */ 688 #define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3 \ 689 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 690 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 691 && ((t) != 0))/* Packet type should be one of valid but at least one should be specified */ 692 693 #define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 694 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 695 | HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) \ 696 && ((t) != 0)) 697 698 #define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 699 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 700 | HCI_ESCO_PKT_TYPES_MASK_HV3 \ 701 | HCI_ESCO_PKT_TYPES_MASK_EV3 \ 702 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 703 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 704 && ((t) != 0)) 705 706 /* 707 ** Define parameters to allow role switch during create connection 708 */ 709 #define HCI_CR_CONN_NOT_ALLOW_SWITCH 0x00 710 #define HCI_CR_CONN_ALLOW_SWITCH 0x01 711 712 /* 713 ** Hold Mode command destination 714 */ 715 #define HOLD_MODE_DEST_LOCAL_DEVICE 0x00 716 #define HOLD_MODE_DEST_RMT_DEVICE 0x01 717 718 /* 719 ** Definitions for different HCI parameters 720 */ 721 #define HCI_PER_INQ_MIN_MAX_PERIOD 0x0003 722 #define HCI_PER_INQ_MAX_MAX_PERIOD 0xFFFF 723 #define HCI_PER_INQ_MIN_MIN_PERIOD 0x0002 724 #define HCI_PER_INQ_MAX_MIN_PERIOD 0xFFFE 725 726 #define HCI_MAX_INQUIRY_LENGTH 0x30 727 728 #define HCI_MIN_INQ_LAP 0x9E8B00 729 #define HCI_MAX_INQ_LAP 0x9E8B3F 730 731 /* HCI role defenitions */ 732 #define HCI_ROLE_MASTER 0x00 733 #define HCI_ROLE_SLAVE 0x01 734 #define HCI_ROLE_UNKNOWN 0xff 735 736 /* HCI mode defenitions */ 737 #define HCI_MODE_ACTIVE 0x00 738 #define HCI_MODE_HOLD 0x01 739 #define HCI_MODE_SNIFF 0x02 740 #define HCI_MODE_PARK 0x03 741 742 /* HCI Flow Control Mode defenitions */ 743 #define HCI_PACKET_BASED_FC_MODE 0x00 744 #define HCI_BLOCK_BASED_FC_MODE 0x01 745 746 /* Define Packet types as requested by the Host */ 747 #define HCI_ACL_PKT_TYPE_NONE 0x0000 748 #define HCI_ACL_PKT_TYPE_DM1 0x0008 749 #define HCI_ACL_PKT_TYPE_DH1 0x0010 750 #define HCI_ACL_PKT_TYPE_AUX1 0x0200 751 #define HCI_ACL_PKT_TYPE_DM3 0x0400 752 #define HCI_ACL_PKT_TYPE_DH3 0x0800 753 #define HCI_ACL_PKT_TYPE_DM5 0x4000 754 #define HCI_ACL_PKT_TYPE_DH5 0x8000 755 756 /* Define key type in the Master Link Key command */ 757 #define HCI_USE_SEMI_PERMANENT_KEY 0x00 758 #define HCI_USE_TEMPORARY_KEY 0x01 759 760 /* Page scan period modes */ 761 #define HCI_PAGE_SCAN_REP_MODE_R0 0x00 762 #define HCI_PAGE_SCAN_REP_MODE_R1 0x01 763 #define HCI_PAGE_SCAN_REP_MODE_R2 0x02 764 765 /* Define limits for page scan repetition modes */ 766 #define HCI_PAGE_SCAN_R1_LIMIT 0x0800 767 #define HCI_PAGE_SCAN_R2_LIMIT 0x1000 768 769 /* Page scan period modes */ 770 #define HCI_PAGE_SCAN_PER_MODE_P0 0x00 771 #define HCI_PAGE_SCAN_PER_MODE_P1 0x01 772 #define HCI_PAGE_SCAN_PER_MODE_P2 0x02 773 774 /* Page scan modes */ 775 #define HCI_MANDATARY_PAGE_SCAN_MODE 0x00 776 #define HCI_OPTIONAL_PAGE_SCAN_MODE1 0x01 777 #define HCI_OPTIONAL_PAGE_SCAN_MODE2 0x02 778 #define HCI_OPTIONAL_PAGE_SCAN_MODE3 0x03 779 780 /* Page and inquiry scan types */ 781 #define HCI_SCAN_TYPE_STANDARD 0x00 782 #define HCI_SCAN_TYPE_INTERLACED 0x01 /* 1.2 devices or later */ 783 #define HCI_DEF_SCAN_TYPE HCI_SCAN_TYPE_STANDARD 784 785 /* Definitions for quality of service service types */ 786 #define HCI_SERVICE_NO_TRAFFIC 0x00 787 #define HCI_SERVICE_BEST_EFFORT 0x01 788 #define HCI_SERVICE_GUARANTEED 0x02 789 790 #define HCI_QOS_LATENCY_DO_NOT_CARE 0xFFFFFFFF 791 #define HCI_QOS_DELAY_DO_NOT_CARE 0xFFFFFFFF 792 793 /* Definitions for Flow Specification */ 794 #define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF 795 796 /* Definitions for AFH Channel Map */ 797 #define HCI_AFH_CHANNEL_MAP_LEN 10 798 799 /* Definitions for Extended Inquiry Response */ 800 #define HCI_EXT_INQ_RESPONSE_LEN 240 801 #define HCI_EIR_FLAGS_TYPE BT_EIR_FLAGS_TYPE 802 #define HCI_EIR_MORE_16BITS_UUID_TYPE BT_EIR_MORE_16BITS_UUID_TYPE 803 #define HCI_EIR_COMPLETE_16BITS_UUID_TYPE BT_EIR_COMPLETE_16BITS_UUID_TYPE 804 #define HCI_EIR_MORE_32BITS_UUID_TYPE BT_EIR_MORE_32BITS_UUID_TYPE 805 #define HCI_EIR_COMPLETE_32BITS_UUID_TYPE BT_EIR_COMPLETE_32BITS_UUID_TYPE 806 #define HCI_EIR_MORE_128BITS_UUID_TYPE BT_EIR_MORE_128BITS_UUID_TYPE 807 #define HCI_EIR_COMPLETE_128BITS_UUID_TYPE BT_EIR_COMPLETE_128BITS_UUID_TYPE 808 #define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE BT_EIR_SHORTENED_LOCAL_NAME_TYPE 809 #define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE BT_EIR_COMPLETE_LOCAL_NAME_TYPE 810 #define HCI_EIR_TX_POWER_LEVEL_TYPE BT_EIR_TX_POWER_LEVEL_TYPE 811 #define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE BT_EIR_MANUFACTURER_SPECIFIC_TYPE 812 #define HCI_EIR_OOB_BD_ADDR_TYPE BT_EIR_OOB_BD_ADDR_TYPE 813 #define HCI_EIR_OOB_COD_TYPE BT_EIR_OOB_COD_TYPE 814 #define HCI_EIR_OOB_SSP_HASH_C_TYPE BT_EIR_OOB_SSP_HASH_C_TYPE 815 #define HCI_EIR_OOB_SSP_RAND_R_TYPE BT_EIR_OOB_SSP_RAND_R_TYPE 816 817 /* Definitions for Write Simple Pairing Mode */ 818 #define HCI_SP_MODE_UNDEFINED 0x00 819 #define HCI_SP_MODE_ENABLED 0x01 820 821 /* Definitions for Write Simple Pairing Debug Mode */ 822 #define HCI_SPD_MODE_DISABLED 0x00 823 #define HCI_SPD_MODE_ENABLED 0x01 824 825 /* Definitions for IO Capability Response/Command */ 826 #define HCI_IO_CAP_DISPLAY_ONLY 0x00 827 #define HCI_IO_CAP_DISPLAY_YESNO 0x01 828 #define HCI_IO_CAP_KEYBOARD_ONLY 0x02 829 #define HCI_IO_CAP_NO_IO 0x03 830 831 #define HCI_OOB_AUTH_DATA_NOT_PRESENT 0x00 832 #define HCI_OOB_REM_AUTH_DATA_PRESENT 0x01 833 834 #define HCI_MITM_PROTECT_NOT_REQUIRED 0x00 835 #define HCI_MITM_PROTECT_REQUIRED 0x01 836 837 838 /* Policy settings status */ 839 #define HCI_DISABLE_ALL_LM_MODES 0x0000 840 #define HCI_ENABLE_MASTER_SLAVE_SWITCH 0x0001 841 #define HCI_ENABLE_HOLD_MODE 0x0002 842 #define HCI_ENABLE_SNIFF_MODE 0x0004 843 #define HCI_ENABLE_PARK_MODE 0x0008 844 845 /* By default allow switch, because host can not allow that */ 846 /* that until he created the connection */ 847 #define HCI_DEFAULT_POLICY_SETTINGS HCI_DISABLE_ALL_LM_MODES 848 849 /* Filters that are sent in set filter command */ 850 #define HCI_FILTER_TYPE_CLEAR_ALL 0x00 851 #define HCI_FILTER_INQUIRY_RESULT 0x01 852 #define HCI_FILTER_CONNECTION_SETUP 0x02 853 854 #define HCI_FILTER_COND_NEW_DEVICE 0x00 855 #define HCI_FILTER_COND_DEVICE_CLASS 0x01 856 #define HCI_FILTER_COND_BD_ADDR 0x02 857 858 #define HCI_DO_NOT_AUTO_ACCEPT_CONNECT 1 859 #define HCI_DO_AUTO_ACCEPT_CONNECT 2 /* role switch disabled */ 860 #define HCI_DO_AUTO_ACCEPT_CONNECT_RS 3 /* role switch enabled (1.1 errata 1115) */ 861 862 /* Auto accept flags */ 863 #define HCI_AUTO_ACCEPT_OFF 0x00 864 #define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01 865 #define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02 866 867 /* PIN type */ 868 #define HCI_PIN_TYPE_VARIABLE 0 869 #define HCI_PIN_TYPE_FIXED 1 870 871 /* Loopback Modes */ 872 #define HCI_LOOPBACK_MODE_DISABLED 0 873 #define HCI_LOOPBACK_MODE_LOCAL 1 874 #define HCI_LOOPBACK_MODE_REMOTE 2 875 876 #define SLOTS_PER_10MS 16 /* 0.625 ms slots in a 10 ms tick */ 877 878 /* Maximum connection accept timeout in 0.625msec */ 879 #define HCI_MAX_CONN_ACCEPT_TOUT 0xB540 /* 29 sec */ 880 #define HCI_DEF_CONN_ACCEPT_TOUT 0x1F40 /* 5 sec */ 881 882 /* Page timeout is used in LC only and LC is counting down slots not using OS */ 883 #define HCI_DEFAULT_PAGE_TOUT 0x2000 /* 5.12 sec (in slots) */ 884 885 /* Scan enable flags */ 886 #define HCI_NO_SCAN_ENABLED 0x00 887 #define HCI_INQUIRY_SCAN_ENABLED 0x01 888 #define HCI_PAGE_SCAN_ENABLED 0x02 889 890 /* Pagescan timer definitions in 0.625 ms */ 891 #define HCI_MIN_PAGESCAN_INTERVAL 0x12 /* 11.25 ms */ 892 #define HCI_MAX_PAGESCAN_INTERVAL 0x1000 /* 2.56 sec */ 893 #define HCI_DEF_PAGESCAN_INTERVAL 0x0800 /* 1.28 sec */ 894 895 /* Parameter for pagescan window is passed to LC and is kept in slots */ 896 #define HCI_MIN_PAGESCAN_WINDOW 0x11 /* 10.625 ms */ 897 #define HCI_MAX_PAGESCAN_WINDOW 0x1000 /* 2.56 sec */ 898 #define HCI_DEF_PAGESCAN_WINDOW 0x12 /* 11.25 ms */ 899 900 /* Inquiryscan timer definitions in 0.625 ms */ 901 #define HCI_MIN_INQUIRYSCAN_INTERVAL 0x12 /* 11.25 ms */ 902 #define HCI_MAX_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 903 #define HCI_DEF_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 904 905 /* Parameter for inquiryscan window is passed to LC and is kept in slots */ 906 #define HCI_MIN_INQUIRYSCAN_WINDOW 0x11 /* 10.625 ms */ 907 #define HCI_MAX_INQUIRYSCAN_WINDOW 0x1000 /* 2.56 sec */ 908 #define HCI_DEF_INQUIRYSCAN_WINDOW 0x12 /* 11.25 ms */ 909 910 /* Encryption modes */ 911 #define HCI_ENCRYPT_MODE_DISABLED 0x00 912 #define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01 913 #define HCI_ENCRYPT_MODE_ALL 0x02 914 915 /* Voice settings */ 916 #define HCI_INP_CODING_LINEAR 0x0000 /* 0000000000 */ 917 #define HCI_INP_CODING_U_LAW 0x0100 /* 0100000000 */ 918 #define HCI_INP_CODING_A_LAW 0x0200 /* 1000000000 */ 919 #define HCI_INP_CODING_MASK 0x0300 /* 1100000000 */ 920 921 #define HCI_INP_DATA_FMT_1S_COMPLEMENT 0x0000 /* 0000000000 */ 922 #define HCI_INP_DATA_FMT_2S_COMPLEMENT 0x0040 /* 0001000000 */ 923 #define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */ 924 #define HCI_INP_DATA_FMT_UNSIGNED 0x00c0 /* 0011000000 */ 925 #define HCI_INP_DATA_FMT_MASK 0x00c0 /* 0011000000 */ 926 927 #define HCI_INP_SAMPLE_SIZE_8BIT 0x0000 /* 0000000000 */ 928 #define HCI_INP_SAMPLE_SIZE_16BIT 0x0020 /* 0000100000 */ 929 #define HCI_INP_SAMPLE_SIZE_MASK 0x0020 /* 0000100000 */ 930 931 #define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */ 932 #define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2 933 934 #define HCI_AIR_CODING_FORMAT_CVSD 0x0000 /* 0000000000 */ 935 #define HCI_AIR_CODING_FORMAT_U_LAW 0x0001 /* 0000000001 */ 936 #define HCI_AIR_CODING_FORMAT_A_LAW 0x0002 /* 0000000010 */ 937 #define HCI_AIR_CODING_FORMAT_TRANSPNT 0x0003 /* 0000000011 */ 938 #define HCI_AIR_CODING_FORMAT_MASK 0x0003 /* 0000000011 */ 939 940 /* default 0001100000 */ 941 #define HCI_DEFAULT_VOICE_SETTINGS (HCI_INP_CODING_LINEAR \ 942 | HCI_INP_DATA_FMT_2S_COMPLEMENT \ 943 | HCI_INP_SAMPLE_SIZE_16BIT \ 944 | HCI_AIR_CODING_FORMAT_CVSD) 945 946 #define HCI_CVSD_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD) 947 #define HCI_U_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW) 948 #define HCI_A_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW) 949 #define HCI_TRANSPNT_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT) 950 951 /* Retransmit timer definitions in 0.625 */ 952 #define HCI_MAX_AUTO_FLUSH_TOUT 0x07FF 953 #define HCI_DEFAULT_AUTO_FLUSH_TOUT 0 /* No auto flush */ 954 955 /* Broadcast retransmitions */ 956 #define HCI_DEFAULT_NUM_BCAST_RETRAN 1 957 958 /* Define broadcast data types as passed in the hci data packet */ 959 #define HCI_DATA_POINT_TO_POINT 0x00 960 #define HCI_DATA_ACTIVE_BCAST 0x01 961 #define HCI_DATA_PICONET_BCAST 0x02 962 963 /* Hold mode activity */ 964 #define HCI_MAINTAIN_CUR_POWER_STATE 0x00 965 #define HCI_SUSPEND_PAGE_SCAN 0x01 966 #define HCI_SUSPEND_INQUIRY_SCAN 0x02 967 #define HCI_SUSPEND_PERIODIC_INQUIRIES 0x04 968 969 /* Default Link Supervision timeoout */ 970 #define HCI_DEFAULT_INACT_TOUT 0x7D00 /* BR/EDR (20 seconds) */ 971 #define HCI_DEFAULT_AMP_INACT_TOUT 0x3E80 /* AMP (10 seconds) */ 972 973 /* Read transmit power level parameter */ 974 #define HCI_READ_CURRENT 0x00 975 #define HCI_READ_MAXIMUM 0x01 976 977 /* Link types for connection complete event */ 978 #define HCI_LINK_TYPE_SCO 0x00 979 #define HCI_LINK_TYPE_ACL 0x01 980 #define HCI_LINK_TYPE_ESCO 0x02 981 982 /* Link Key Notification Event (Key Type) definitions */ 983 #define HCI_LKEY_TYPE_COMBINATION 0x00 984 #define HCI_LKEY_TYPE_LOCAL_UNIT 0x01 985 #define HCI_LKEY_TYPE_REMOTE_UNIT 0x02 986 #define HCI_LKEY_TYPE_DEBUG_COMB 0x03 987 #define HCI_LKEY_TYPE_UNAUTH_COMB 0x04 988 #define HCI_LKEY_TYPE_AUTH_COMB 0x05 989 #define HCI_LKEY_TYPE_CHANGED_COMB 0x06 990 991 /* Internal definitions - not used over HCI */ 992 #define HCI_LKEY_TYPE_AMP_WIFI 0x80 993 #define HCI_LKEY_TYPE_AMP_UWB 0x81 994 #define HCI_LKEY_TYPE_UNKNOWN 0xff 995 996 /* Read Local Version HCI Version return values (Command Complete Event) */ 997 #define HCI_VERSION_1_0B 0x00 998 #define HCI_VERSION_1_1 0x01 999 1000 /* Define an invalid value for a handle */ 1001 #define HCI_INVALID_HANDLE 0xFFFF 1002 1003 /* Define max ammount of data in the HCI command */ 1004 #define HCI_COMMAND_SIZE 255 1005 1006 /* Define the preamble length for all HCI Commands. 1007 ** This is 2-bytes for opcode and 1 byte for length 1008 */ 1009 #define HCIC_PREAMBLE_SIZE 3 1010 1011 /* Define the preamble length for all HCI Events 1012 ** This is 1-byte for opcode and 1 byte for length 1013 */ 1014 #define HCIE_PREAMBLE_SIZE 2 1015 #define HCI_SCO_PREAMBLE_SIZE 3 1016 #define HCI_DATA_PREAMBLE_SIZE 4 1017 1018 /* local Bluetooth controller id for AMP HCI */ 1019 #define LOCAL_BR_EDR_CONTROLLER_ID 0 1020 1021 /* controller id types for AMP HCI */ 1022 #define HCI_CONTROLLER_TYPE_BR_EDR 0 1023 #define HCI_CONTROLLER_TYPE_802_11 1 1024 #define HCI_CONTROLLER_TYPE_ECMA 2 1025 #define HCI_MAX_CONTROLLER_TYPES 3 1026 1027 /* ConnectionLess Broadcast */ 1028 #define HCI_CLB_DISABLE 0x00 1029 #define HCI_CLB_ENABLE 0x01 1030 1031 /* ConnectionLess Broadcast Data fragment */ 1032 #define HCI_CLB_FRAGMENT_CONT 0x00 1033 #define HCI_CLB_FRAGMENT_START 0x01 1034 #define HCI_CLB_FRAGMENT_END 0x02 1035 #define HCI_CLB_FRAGMENT_SINGLE 0x03 1036 1037 /* AMP Controller Status codes 1038 */ 1039 #define HCI_AMP_CTRLR_PHYSICALLY_DOWN 0 1040 #define HCI_AMP_CTRLR_USABLE_BY_BT 1 1041 #define HCI_AMP_CTRLR_UNUSABLE_FOR_BT 2 1042 #define HCI_AMP_CTRLR_LOW_CAP_FOR_BT 3 1043 #define HCI_AMP_CTRLR_MED_CAP_FOR_BT 4 1044 #define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT 5 1045 #define HCI_AMP_CTRLR_FULL_CAP_FOR_BT 6 1046 1047 #define HCI_MAX_AMP_STATUS_TYPES 7 1048 1049 1050 /* Define the extended flow specification fields used by AMP */ 1051 typedef struct 1052 { 1053 UINT8 id; 1054 UINT8 stype; 1055 UINT16 max_sdu_size; 1056 UINT32 sdu_inter_time; 1057 UINT32 access_latency; 1058 UINT32 flush_timeout; 1059 } tHCI_EXT_FLOW_SPEC; 1060 1061 1062 /* HCI message type definitions (for H4 messages) */ 1063 #define HCIT_TYPE_COMMAND 1 1064 #define HCIT_TYPE_ACL_DATA 2 1065 #define HCIT_TYPE_SCO_DATA 3 1066 #define HCIT_TYPE_EVENT 4 1067 #define HCIT_TYPE_LM_DIAG 7 1068 #define HCIT_TYPE_NFC 16 1069 1070 #define HCIT_LM_DIAG_LENGTH 63 1071 1072 /* Parameter information for HCI_BRCM_SET_ACL_PRIORITY */ 1073 #define HCI_BRCM_ACL_PRIORITY_PARAM_SIZE 3 1074 #define HCI_BRCM_ACL_PRIORITY_LOW 0x00 1075 #define HCI_BRCM_ACL_PRIORITY_HIGH 0xFF 1076 #define HCI_BRCM_SET_ACL_PRIORITY (0x0057 | HCI_GRP_VENDOR_SPECIFIC) 1077 1078 /* Define values for LMP Test Control parameters 1079 ** Test Scenario, Hopping Mode, Power Control Mode 1080 */ 1081 #define LMP_TESTCTL_TESTSC_PAUSE 0 1082 #define LMP_TESTCTL_TESTSC_TXTEST_0 1 1083 #define LMP_TESTCTL_TESTSC_TXTEST_1 2 1084 #define LMP_TESTCTL_TESTSC_TXTEST_1010 3 1085 #define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4 1086 #define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5 1087 #define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6 1088 #define LMP_TESTCTL_TESTSC_ACL_NOWHIT 7 1089 #define LMP_TESTCTL_TESTSC_SCO_NOWHIT 8 1090 #define LMP_TESTCTL_TESTSC_TXTEST_11110000 9 1091 #define LMP_TESTCTL_TESTSC_EXITTESTMODE 255 1092 1093 #define LMP_TESTCTL_HOPMOD_RXTX1FREQ 0 1094 #define LMP_TESTCTL_HOPMOD_HOP_EURUSA 1 1095 #define LMP_TESTCTL_HOPMOD_HOP_JAPAN 2 1096 #define LMP_TESTCTL_HOPMOD_HOP_FRANCE 3 1097 #define LMP_TESTCTL_HOPMOD_HOP_SPAIN 4 1098 #define LMP_TESTCTL_HOPMOD_REDUCED_HOP 5 1099 1100 #define LMP_TESTCTL_POWCTL_FIXEDTX_OP 0 1101 #define LMP_TESTCTL_POWCTL_ADAPTIVE 1 1102 1103 1104 /* 1105 ** Define company IDs (from Bluetooth Assigned Numbers v1.1, section 2.2) 1106 */ 1107 #define LMP_COMPID_ERICSSON 0 1108 #define LMP_COMPID_NOKIA 1 1109 #define LMP_COMPID_INTEL 2 1110 #define LMP_COMPID_IBM 3 1111 #define LMP_COMPID_TOSHIBA 4 1112 #define LMP_COMPID_3COM 5 1113 #define LMP_COMPID_MICROSOFT 6 1114 #define LMP_COMPID_LUCENT 7 1115 #define LMP_COMPID_MOTOROLA 8 1116 #define LMP_COMPID_INFINEON 9 1117 #define LMP_COMPID_CSR 10 1118 #define LMP_COMPID_SILICON_WAVE 11 1119 #define LMP_COMPID_DIGIANSWER 12 1120 #define LMP_COMPID_TEXAS_INSTRUMENTS 13 1121 #define LMP_COMPID_PARTHUS 14 1122 #define LMP_COMPID_BROADCOM 15 1123 #define LMP_COMPID_MITEL_SEMI 16 1124 #define LMP_COMPID_WIDCOMM 17 1125 #define LMP_COMPID_ZEEVO 18 1126 #define LMP_COMPID_ATMEL 19 1127 #define LMP_COMPID_MITSUBISHI 20 1128 #define LMP_COMPID_RTX_TELECOM 21 1129 #define LMP_COMPID_KC_TECH 22 1130 #define LMP_COMPID_NEWLOGIC 23 1131 #define LMP_COMPID_TRANSILICA 24 1132 #define LMP_COMPID_ROHDE_SCHWARZ 25 1133 #define LMP_COMPID_TTPCOM 26 1134 #define LMP_COMPID_SIGNIA 27 1135 #define LMP_COMPID_CONEXANT 28 1136 #define LMP_COMPID_QUALCOMM 29 1137 #define LMP_COMPID_INVENTEL 30 1138 #define LMP_COMPID_AVM 31 1139 #define LMP_COMPID_BANDSPEED 32 1140 #define LMP_COMPID_MANSELLA 33 1141 #define LMP_COMPID_NEC_CORP 34 1142 #define LMP_COMPID_WAVEPLUS 35 1143 #define LMP_COMPID_ALCATEL 36 1144 #define LMP_COMPID_PHILIPS 37 1145 #define LMP_COMPID_C_TECHNOLOGIES 38 1146 #define LMP_COMPID_OPEN_INTERFACE 39 1147 #define LMP_COMPID_RF_MICRO 40 1148 #define LMP_COMPID_HITACHI 41 1149 #define LMP_COMPID_SYMBOL_TECH 42 1150 #define LMP_COMPID_TENOVIS 43 1151 #define LMP_COMPID_MACRONIX 44 1152 #define LMP_COMPID_GCT_SEMI 45 1153 #define LMP_COMPID_NORWOOD_SYSTEMS 46 1154 #define LMP_COMPID_MEWTEL_TECH 47 1155 #define LMP_COMPID_STM 48 1156 #define LMP_COMPID_SYNOPSYS 49 1157 #define LMP_COMPID_RED_M_LTD 50 1158 #define LMP_COMPID_COMMIL_LTD 51 1159 #define LMP_COMPID_CATC 52 1160 #define LMP_COMPID_ECLIPSE 53 1161 #define LMP_COMPID_RENESAS_TECH 54 1162 #define LMP_COMPID_MOBILIAN_CORP 55 1163 #define LMP_COMPID_TERAX 56 1164 #define LMP_COMPID_ISSC 57 1165 #define LMP_COMPID_MATSUSHITA 58 1166 #define LMP_COMPID_GENNUM_CORP 59 1167 #define LMP_COMPID_RESEARCH_IN_MOTION 60 1168 #define LMP_COMPID_IPEXTREME 61 1169 #define LMP_COMPID_SYSTEMS_AND_CHIPS 62 1170 #define LMP_COMPID_BLUETOOTH_SIG 63 1171 #define LMP_COMPID_SEIKO_EPSON_CORP 64 1172 #define LMP_COMPID_ISS_TAIWAN 65 1173 #define LMP_COMPID_CONWISE_TECHNOLOGIES 66 1174 #define LMP_COMPID_PARROT_SA 67 1175 #define LMP_COMPID_SOCKET_COMM 68 1176 #define LMP_COMPID_ALTHEROS 69 1177 #define LMP_COMPID_MEDIATEK 70 1178 #define LMP_COMPID_BLUEGIGA 71 1179 #define LMP_COMPID_MARVELL 72 1180 #define LMP_COMPID_3DSP_CORP 73 1181 #define LMP_COMPID_ACCEL_SEMICONDUCTOR 74 1182 #define LMP_COMPID_CONTINENTAL_AUTO 75 1183 #define LMP_COMPID_APPLE 76 1184 #define LMP_COMPID_STACCATO 77 1185 #define LMP_COMPID_AVAGO_TECHNOLOGIES 78 1186 #define LMP_COMPID_APT_LTD 79 1187 #define LMP_COMPID_SIRF_TECHNOLOGY 80 1188 #define LMP_COMPID_TZERO_TECHNOLOGY 81 1189 #define LMP_COMPID_J_AND_M_CORP 82 1190 #define LMP_COMPID_FREE_2_MOVE 83 1191 #define LMP_COMPID_3DIJOY_CORP 84 1192 #define LMP_COMPID_PLANTRONICS 85 1193 #define LMP_COMPID_SONY_ERICSSON_MOBILE 86 1194 #define LMP_COMPID_HARMON_INTL_IND 87 1195 #define LMP_COMPID_VIZIO 88 1196 #define LMP_COMPID_NORDIC SEMI 89 1197 #define LMP_COMPID_EM MICRO 90 1198 #define LMP_COMPID_RALINK TECH 91 1199 #define LMP_COMPID_BELKIN INC 92 1200 #define LMP_COMPID_REALTEK SEMI 93 1201 #define LMP_COMPID_STONESTREET ONE 94 1202 #define LMP_COMPID_WICENTRIC 95 1203 #define LMP_COMPID_RIVIERAWAVES 96 1204 #define LMP_COMPID_RDA MICRO 97 1205 #define LMP_COMPID_GIBSON GUITARS 98 1206 #define LMP_COMPID_MICOMMAND INC 99 1207 #define LMP_COMPID_BAND XI 100 1208 #define LMP_COMPID_HP COMPANY 101 1209 #define LMP_COMPID_9SOLUTIONS OY 102 1210 #define LMP_COMPID_GN NETCOM 103 1211 #define LMP_COMPID_GENERAL MOTORS 104 1212 #define LMP_COMPID_AD ENGINEERING 105 1213 #define LMP_COMPID_MINDTREE LTD 106 1214 #define LMP_COMPID_POLAR ELECTRO 107 1215 #define LMP_COMPID_BEAUTIFUL ENTERPRISE 108 1216 #define LMP_COMPID_BRIARTEK 109 1217 #define LMP_COMPID_SUMMIT DATA COMM 110 1218 #define LMP_COMPID_SOUND ID 111 1219 #define LMP_COMPID_MONSTER LLC 112 1220 #define LMP_COMPID_CONNECTBLU 113 1221 1222 #define LMP_COMPID_SHANGHAI_SSE 114 1223 #define LMP_COMPID_GROUP_SENSE 115 1224 #define LMP_COMPID_ZOMM 116 1225 #define LMP_COMPID_SAMSUNG 117 1226 #define LMP_COMPID_CREATIVE_TECH 118 1227 #define LMP_COMPID_LAIRD_TECH 119 1228 #define LMP_COMPID_NIKE 120 1229 #define LMP_COMPID_LESSWIRE 121 1230 #define LMP_COMPID_MSTAR_SEMI 122 1231 #define LMP_COMPID_HANLYNN_TECH 123 1232 #define LMP_COMPID_AR_CAMBRIDGE 124 1233 #define LMP_COMPID_SEERS_TECH 125 1234 #define LMP_COMPID_SPORTS_TRACKING 126 1235 #define LMP_COMPID_AUTONET_MOBILE 127 1236 #define LMP_COMPID_DELORME_PUBLISH 128 1237 #define LMP_COMPID_WUXI_VIMICRO 129 1238 #define LMP_COMPID_SENNHEISER 130 1239 #define LMP_COMPID_TIME_KEEPING_SYS 131 1240 #define LMP_COMPID_LUDUS_HELSINKI 132 1241 #define LMP_COMPID_BLUE_RADIOS 133 1242 #define LMP_COMPID_EQUINUX 134 1243 #define LMP_COMPID_GARMIN_INTL 135 1244 #define LMP_COMPID_ECOTEST 136 1245 #define LMP_COMPID_GN_RESOUND 137 1246 #define LMP_COMPID_JAWBONE 138 1247 #define LMP_COMPID_TOPCON_POSITIONING 139 1248 #define LMP_COMPID_QUALCOMM_LABS 140 1249 #define LMP_COMPID_ZSCAN_SOFTWARE 141 1250 #define LMP_COMPID_QUINTIC 142 1251 #define LMP_COMPID_STOLLMAN_EV 143 1252 #define LMP_COMPID_FUNAI_ELECTRONIC 144 1253 #define LMP_COMPID_ADV_PANMOBILE 145 1254 #define LMP_COMPID_THINK_OPTICS 146 1255 #define LMP_COMPID_UNIVERSAL_ELEC 147 1256 #define LMP_COMPID_AIROHA_TECH 148 1257 #define LMP_COMPID_MAX_ID 149 /* this is a place holder */ 1258 #define LMP_COMPID_INTERNAL 65535 1259 1260 #define MAX_LMP_COMPID (LMP_COMPID_MAX_ID) 1261 /* 1262 ** Define the packet types in the packet header, and a couple extra 1263 */ 1264 #define PKT_TYPE_NULL 0x00 1265 #define PKT_TYPE_POLL 0x01 1266 #define PKT_TYPE_FHS 0x02 1267 #define PKT_TYPE_DM1 0x03 1268 1269 #define PKT_TYPE_DH1 0x04 1270 #define PKT_TYPE_HV1 0x05 1271 #define PKT_TYPE_HV2 0x06 1272 #define PKT_TYPE_HV3 0x07 1273 #define PKT_TYPE_DV 0x08 1274 #define PKT_TYPE_AUX1 0x09 1275 1276 #define PKT_TYPE_DM3 0x0a 1277 #define PKT_TYPE_DH3 0x0b 1278 1279 #define PKT_TYPE_DM5 0x0e 1280 #define PKT_TYPE_DH5 0x0f 1281 1282 1283 #define PKT_TYPE_ID 0x10 /* Internally used packet types */ 1284 #define PKT_TYPE_BAD 0x11 1285 #define PKT_TYPE_NONE 0x12 1286 1287 /* 1288 ** Define packet size 1289 */ 1290 #define HCI_DM1_PACKET_SIZE 17 1291 #define HCI_DH1_PACKET_SIZE 27 1292 #define HCI_DM3_PACKET_SIZE 121 1293 #define HCI_DH3_PACKET_SIZE 183 1294 #define HCI_DM5_PACKET_SIZE 224 1295 #define HCI_DH5_PACKET_SIZE 339 1296 #define HCI_AUX1_PACKET_SIZE 29 1297 #define HCI_HV1_PACKET_SIZE 10 1298 #define HCI_HV2_PACKET_SIZE 20 1299 #define HCI_HV3_PACKET_SIZE 30 1300 #define HCI_DV_PACKET_SIZE 9 1301 #define HCI_EDR2_DH1_PACKET_SIZE 54 1302 #define HCI_EDR2_DH3_PACKET_SIZE 367 1303 #define HCI_EDR2_DH5_PACKET_SIZE 679 1304 #define HCI_EDR3_DH1_PACKET_SIZE 83 1305 #define HCI_EDR3_DH3_PACKET_SIZE 552 1306 #define HCI_EDR3_DH5_PACKET_SIZE 1021 1307 1308 /* Feature Pages */ 1309 #define HCI_EXT_FEATURES_PAGE_0 0 /* Extended Feature Page 0 (regular features) */ 1310 #define HCI_EXT_FEATURES_PAGE_1 1 /* Extended Feature Page 1 */ 1311 #define HCI_EXT_FEATURES_PAGE_2 2 /* Extended Feature Page 2 */ 1312 #define HCI_EXT_FEATURES_PAGE_MAX HCI_EXT_FEATURES_PAGE_2 1313 1314 #define HCI_FEATURE_BYTES_PER_PAGE 8 1315 1316 #define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0) 1317 1318 /* 1319 ** LMP features encoding - page 0 1320 */ 1321 #define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01 1322 #define HCI_FEATURE_3_SLOT_PACKETS_OFF 0 1323 #define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK) 1324 1325 #define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02 1326 #define HCI_FEATURE_5_SLOT_PACKETS_OFF 0 1327 #define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK) 1328 1329 #define HCI_FEATURE_ENCRYPTION_MASK 0x04 1330 #define HCI_FEATURE_ENCRYPTION_OFF 0 1331 #define HCI_ENCRYPTION_SUPPORTED(x) ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK) 1332 1333 #define HCI_FEATURE_SLOT_OFFSET_MASK 0x08 1334 #define HCI_FEATURE_SLOT_OFFSET_OFF 0 1335 #define HCI_SLOT_OFFSET_SUPPORTED(x) ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK) 1336 1337 #define HCI_FEATURE_TIMING_ACC_MASK 0x10 1338 #define HCI_FEATURE_TIMING_ACC_OFF 0 1339 #define HCI_TIMING_ACC_SUPPORTED(x) ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK) 1340 1341 #define HCI_FEATURE_SWITCH_MASK 0x20 1342 #define HCI_FEATURE_SWITCH_OFF 0 1343 #define HCI_SWITCH_SUPPORTED(x) ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK) 1344 1345 #define HCI_FEATURE_HOLD_MODE_MASK 0x40 1346 #define HCI_FEATURE_HOLD_MODE_OFF 0 1347 #define HCI_HOLD_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK) 1348 1349 #define HCI_FEATURE_SNIFF_MODE_MASK 0x80 1350 #define HCI_FEATURE_SNIFF_MODE_OFF 0 1351 #define HCI_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK) 1352 1353 #define HCI_FEATURE_PARK_MODE_MASK 0x01 1354 #define HCI_FEATURE_PARK_MODE_OFF 1 1355 #define HCI_PARK_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK) 1356 1357 #define HCI_FEATURE_RSSI_MASK 0x02 1358 #define HCI_FEATURE_RSSI_OFF 1 1359 #define HCI_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK) 1360 1361 #define HCI_FEATURE_CQM_DATA_RATE_MASK 0x04 1362 #define HCI_FEATURE_CQM_DATA_RATE_OFF 1 1363 #define HCI_CQM_DATA_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK) 1364 1365 #define HCI_FEATURE_SCO_LINK_MASK 0x08 1366 #define HCI_FEATURE_SCO_LINK_OFF 1 1367 #define HCI_SCO_LINK_SUPPORTED(x) ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK) 1368 1369 #define HCI_FEATURE_HV2_PACKETS_MASK 0x10 1370 #define HCI_FEATURE_HV2_PACKETS_OFF 1 1371 #define HCI_HV2_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK) 1372 1373 #define HCI_FEATURE_HV3_PACKETS_MASK 0x20 1374 #define HCI_FEATURE_HV3_PACKETS_OFF 1 1375 #define HCI_HV3_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK) 1376 1377 #define HCI_FEATURE_U_LAW_MASK 0x40 1378 #define HCI_FEATURE_U_LAW_OFF 1 1379 #define HCI_LMP_U_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK) 1380 1381 #define HCI_FEATURE_A_LAW_MASK 0x80 1382 #define HCI_FEATURE_A_LAW_OFF 1 1383 #define HCI_LMP_A_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK) 1384 1385 #define HCI_FEATURE_CVSD_MASK 0x01 1386 #define HCI_FEATURE_CVSD_OFF 2 1387 #define HCI_LMP_CVSD_SUPPORTED(x) ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK) 1388 1389 #define HCI_FEATURE_PAGING_SCHEME_MASK 0x02 1390 #define HCI_FEATURE_PAGING_SCHEME_OFF 2 1391 #define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK) 1392 1393 #define HCI_FEATURE_POWER_CTRL_MASK 0x04 1394 #define HCI_FEATURE_POWER_CTRL_OFF 2 1395 #define HCI_POWER_CTRL_SUPPORTED(x) ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK) 1396 1397 #define HCI_FEATURE_TRANSPNT_MASK 0x08 1398 #define HCI_FEATURE_TRANSPNT_OFF 2 1399 #define HCI_LMP_TRANSPNT_SUPPORTED(x) ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK) 1400 1401 #define HCI_FEATURE_FLOW_CTRL_LAG_MASK 0x70 1402 #define HCI_FEATURE_FLOW_CTRL_LAG_OFF 2 1403 #define HCI_FLOW_CTRL_LAG_VALUE(x) (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4) 1404 1405 #define HCI_FEATURE_BROADCAST_ENC_MASK 0x80 1406 #define HCI_FEATURE_BROADCAST_ENC_OFF 2 1407 #define HCI_LMP_BCAST_ENC_SUPPORTED(x) ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK) 1408 1409 #define HCI_FEATURE_SCATTER_MODE_MASK 0x01 1410 #define HCI_FEATURE_SCATTER_MODE_OFF 3 1411 #define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK) 1412 1413 #define HCI_FEATURE_EDR_ACL_2MPS_MASK 0x02 1414 #define HCI_FEATURE_EDR_ACL_2MPS_OFF 3 1415 #define HCI_EDR_ACL_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK) 1416 1417 #define HCI_FEATURE_EDR_ACL_3MPS_MASK 0x04 1418 #define HCI_FEATURE_EDR_ACL_3MPS_OFF 3 1419 #define HCI_EDR_ACL_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK) 1420 1421 #define HCI_FEATURE_ENHANCED_INQ_MASK 0x08 1422 #define HCI_FEATURE_ENHANCED_INQ_OFF 3 1423 #define HCI_ENHANCED_INQ_SUPPORTED(x) ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK) 1424 1425 #define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK 0x10 1426 #define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF 3 1427 #define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK) 1428 1429 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK 0x20 1430 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF 3 1431 #define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK) 1432 1433 #define HCI_FEATURE_INQ_RSSI_MASK 0x40 1434 #define HCI_FEATURE_INQ_RSSI_OFF 3 1435 #define HCI_LMP_INQ_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK) 1436 1437 #define HCI_FEATURE_ESCO_EV3_MASK 0x80 1438 #define HCI_FEATURE_ESCO_EV3_OFF 3 1439 #define HCI_ESCO_EV3_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK) 1440 1441 #define HCI_FEATURE_ESCO_EV4_MASK 0x01 1442 #define HCI_FEATURE_ESCO_EV4_OFF 4 1443 #define HCI_ESCO_EV4_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK) 1444 1445 #define HCI_FEATURE_ESCO_EV5_MASK 0x02 1446 #define HCI_FEATURE_ESCO_EV5_OFF 4 1447 #define HCI_ESCO_EV5_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK) 1448 1449 #define HCI_FEATURE_ABSENCE_MASKS_MASK 0x04 1450 #define HCI_FEATURE_ABSENCE_MASKS_OFF 4 1451 #define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK) 1452 1453 #define HCI_FEATURE_AFH_CAP_SLAVE_MASK 0x08 1454 #define HCI_FEATURE_AFH_CAP_SLAVE_OFF 4 1455 #define HCI_LMP_AFH_CAP_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_SLAVE_OFF] & HCI_FEATURE_AFH_CAP_SLAVE_MASK) 1456 1457 #define HCI_FEATURE_AFH_CLASS_SLAVE_MASK 0x10 1458 #define HCI_FEATURE_AFH_CLASS_SLAVE_OFF 4 1459 #define HCI_LMP_AFH_CLASS_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_SLAVE_OFF] & HCI_FEATURE_AFH_CLASS_SLAVE_MASK) 1460 1461 #if 1 1462 #define HCI_FEATURE_BREDR_NOT_SPT_MASK 0x20 1463 #define HCI_FEATURE_BREDR_NOT_SPT_OFF 4 1464 #define HCI_BREDR_NOT_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_BREDR_NOT_SPT_OFF] & HCI_FEATURE_BREDR_NOT_SPT_MASK) 1465 1466 #define HCI_FEATURE_LE_SPT_MASK 0x40 1467 #define HCI_FEATURE_LE_SPT_OFF 4 1468 #define HCI_LE_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_LE_SPT_OFF] & HCI_FEATURE_LE_SPT_MASK) 1469 #else 1470 1471 #define HCI_FEATURE_ALIAS_AUTH_MASK 0x20 1472 #define HCI_FEATURE_ALIAS_AUTH_OFF 4 1473 #define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK) 1474 1475 #define HCI_FEATURE_ANON_MODE_MASK 0x40 1476 #define HCI_FEATURE_ANON_MODE_OFF 4 1477 #define HCI_LMP_ANON_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK) 1478 #endif 1479 1480 #define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80 1481 #define HCI_FEATURE_3_SLOT_EDR_ACL_OFF 4 1482 #define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK) 1483 1484 #define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01 1485 #define HCI_FEATURE_5_SLOT_EDR_ACL_OFF 5 1486 #define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK) 1487 1488 #define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02 1489 #define HCI_FEATURE_SNIFF_SUB_RATE_OFF 5 1490 #define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK) 1491 1492 #define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04 1493 #define HCI_FEATURE_ATOMIC_ENCRYPT_OFF 5 1494 #define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK) 1495 1496 #define HCI_FEATURE_AFH_CAP_MASTR_MASK 0x08 1497 #define HCI_FEATURE_AFH_CAP_MASTR_OFF 5 1498 #define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK) 1499 1500 #define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10 1501 #define HCI_FEATURE_AFH_CLASS_MASTR_OFF 5 1502 #define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK) 1503 1504 #define HCI_FEATURE_EDR_ESCO_2MPS_MASK 0x20 1505 #define HCI_FEATURE_EDR_ESCO_2MPS_OFF 5 1506 #define HCI_EDR_ESCO_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK) 1507 1508 #define HCI_FEATURE_EDR_ESCO_3MPS_MASK 0x40 1509 #define HCI_FEATURE_EDR_ESCO_3MPS_OFF 5 1510 #define HCI_EDR_ESCO_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK) 1511 1512 #define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80 1513 #define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF 5 1514 #define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK) 1515 1516 #define HCI_FEATURE_EXT_INQ_RSP_MASK 0x01 1517 #define HCI_FEATURE_EXT_INQ_RSP_OFF 6 1518 #define HCI_EXT_INQ_RSP_SUPPORTED(x) ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK) 1519 1520 #if 1 /* TOKYO spec definition */ 1521 #define HCI_FEATURE_SIMUL_LE_BREDR_MASK 0x02 1522 #define HCI_FEATURE_SIMUL_LE_BREDR_OFF 6 1523 #define HCI_SIMUL_LE_BREDR_SUPPORTED(x) ((x)[HCI_FEATURE_SIMUL_LE_BREDR_OFF] & HCI_FEATURE_SIMUL_LE_BREDR_MASK) 1524 1525 #else 1526 #define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02 1527 #define HCI_FEATURE_ANUM_PIN_AWARE_OFF 6 1528 #define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK) 1529 #endif 1530 1531 #define HCI_FEATURE_ANUM_PIN_CAP_MASK 0x04 1532 #define HCI_FEATURE_ANUM_PIN_CAP_OFF 6 1533 #define HCI_ANUM_PIN_CAP_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK) 1534 1535 #define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08 1536 #define HCI_FEATURE_SIMPLE_PAIRING_OFF 6 1537 #define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK) 1538 1539 #define HCI_FEATURE_ENCAP_PDU_MASK 0x10 1540 #define HCI_FEATURE_ENCAP_PDU_OFF 6 1541 #define HCI_ENCAP_PDU_SUPPORTED(x) ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK) 1542 1543 #define HCI_FEATURE_ERROR_DATA_MASK 0x20 1544 #define HCI_FEATURE_ERROR_DATA_OFF 6 1545 #define HCI_ERROR_DATA_SUPPORTED(x) ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK) 1546 1547 #define HCI_FEATURE_NON_FLUSHABLE_PB_MASK 0x40 1548 #define HCI_FEATURE_NON_FLUSHABLE_PB_OFF 6 1549 1550 // btla-specific ++ 1551 #ifdef ANDROID_APP_INCLUDED 1552 /* This feature is causing frequent link drops when doing call switch with certain av/hfp headsets */ 1553 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) (0)//((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1554 #else 1555 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) ((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1556 #endif 1557 // btla-specific -- 1558 1559 #define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01 1560 #define HCI_FEATURE_LINK_SUP_TO_EVT_OFF 7 1561 #define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK) 1562 1563 #define HCI_FEATURE_INQ_RESP_TX_MASK 0x02 1564 #define HCI_FEATURE_INQ_RESP_TX_OFF 7 1565 #define HCI_INQ_RESP_TX_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK) 1566 1567 #define HCI_FEATURE_EXTENDED_MASK 0x80 1568 #define HCI_FEATURE_EXTENDED_OFF 7 1569 #define HCI_LMP_EXTENDED_SUPPORTED(x) ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK) 1570 1571 /* 1572 ** LMP features encoding - page 1 1573 */ 1574 #define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01 1575 #define HCI_EXT_FEATURE_SSP_HOST_OFF 0 1576 #define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK) 1577 1578 #define HCI_EXT_FEATURE_LE_HOST_MASK 0x02 1579 #define HCI_EXT_FEATURE_LE_HOST_OFF 0 1580 #define HCI_LE_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_LE_HOST_OFF] & HCI_EXT_FEATURE_LE_HOST_MASK) 1581 1582 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK 0x04 1583 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF 0 1584 #define HCI_SIMUL_DUMO_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF] & HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK) 1585 1586 /* 1587 ** LMP features encoding - page 2 1588 */ 1589 #define HCI_EXT_FEATURE_CSB_MASTER_MASK 0x01 1590 #define HCI_EXT_FEATURE_CSB_MASTER_OFF 0 1591 #define HCI_CSB_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_MASTER_OFF] & HCI_EXT_FEATURE_CSB_MASTER_MASK) 1592 1593 #define HCI_EXT_FEATURE_CSB_SLAVE_MASK 0x02 1594 #define HCI_EXT_FEATURE_CSB_SLAVE_OFF 0 1595 #define HCI_CSB_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_SLAVE_OFF] & HCI_EXT_FEATURE_CSB_SLAVE_MASK) 1596 1597 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK 0x04 1598 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF 0 1599 #define HCI_SYNC_TRAIN_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF] & HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK) 1600 1601 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK 0x08 1602 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF 0 1603 #define HCI_SYNC_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF] & HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK) 1604 1605 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK 0x10 1606 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF 0 1607 #define HCI_INQ_RESP_NOTIF_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF] & HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK) 1608 1609 /* 1610 ** LE features encoding - page 0 (the only page for now) 1611 */ 1612 #define HCI_LE_FEATURE_LE_ENCRYPTION_MASK 0x01 1613 #define HCI_LE_FEATURE_LE_ENCRYPTION_OFF 0 1614 #define HCI_LE_ENCRYPTION_SUPPORTED(x) ((x)[HCI_LE_FEATURE_LE_ENCRYPTION_OFF] & HCI_LE_FEATURE_LE_ENCRYPTION_MASK) 1615 1616 1617 /* 1618 ** Local Supported Commands encoding 1619 */ 1620 #define HCI_NUM_SUPP_COMMANDS_BYTES 64 1621 1622 #define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01 1623 #define HCI_SUPP_COMMANDS_INQUIRY_OFF 0 1624 #define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK) 1625 1626 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02 1627 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF 0 1628 #define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK) 1629 1630 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK 0x04 1631 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF 0 1632 #define HCI_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK) 1633 1634 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK 0x08 1635 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF 0 1636 #define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK) 1637 1638 #define HCI_SUPP_COMMANDS_CREATE_CONN_MASK 0x10 1639 #define HCI_SUPP_COMMANDS_CREATE_CONN_OFF 0 1640 #define HCI_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK) 1641 1642 #define HCI_SUPP_COMMANDS_DISCONNECT_MASK 0x20 1643 #define HCI_SUPP_COMMANDS_DISCONNECT_OFF 0 1644 #define HCI_DISCONNECT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK) 1645 1646 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK 0x40 1647 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF 0 1648 #define HCI_ADD_SCO_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK) 1649 1650 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK 0x80 1651 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF 0 1652 #define HCI_CANCEL_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK) 1653 1654 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK 0x01 1655 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF 1 1656 #define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK) 1657 1658 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK 0x02 1659 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF 1 1660 #define HCI_REJECT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK) 1661 1662 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK 0x04 1663 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF 1 1664 #define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK) 1665 1666 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK 0x08 1667 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF 1 1668 #define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK) 1669 1670 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK 0x10 1671 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF 1 1672 #define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK) 1673 1674 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK 0x20 1675 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF 1 1676 #define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK) 1677 1678 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK 0x40 1679 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF 1 1680 #define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK) 1681 1682 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK 0x80 1683 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF 1 1684 #define HCI_AUTH_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK) 1685 1686 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK 0x01 1687 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF 2 1688 #define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK) 1689 1690 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK 0x02 1691 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF 2 1692 #define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK) 1693 1694 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK 0x04 1695 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF 2 1696 #define HCI_MASTER_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK) 1697 1698 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK 0x08 1699 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF 2 1700 #define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK) 1701 1702 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK 0x10 1703 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF 2 1704 #define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK) 1705 1706 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK 0x20 1707 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF 2 1708 #define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK) 1709 1710 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK 0x40 1711 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF 2 1712 #define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK) 1713 1714 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK 0x80 1715 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF 2 1716 #define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK) 1717 1718 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK 0x01 1719 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF 3 1720 #define HCI_READ_CLOCK_OFFSET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK) 1721 1722 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK 0x02 1723 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF 3 1724 #define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK) 1725 1726 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK 0x02 1727 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF 4 1728 #define HCI_HOLD_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK) 1729 1730 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK 0x04 1731 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF 4 1732 #define HCI_SNIFF_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK) 1733 1734 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK 0x08 1735 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF 4 1736 #define HCI_EXIT_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK) 1737 1738 #define HCI_SUPP_COMMANDS_PARK_STATE_MASK 0x10 1739 #define HCI_SUPP_COMMANDS_PARK_STATE_OFF 4 1740 #define HCI_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK) 1741 1742 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK 0x20 1743 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF 4 1744 #define HCI_EXIT_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK) 1745 1746 #define HCI_SUPP_COMMANDS_QOS_SETUP_MASK 0x40 1747 #define HCI_SUPP_COMMANDS_QOS_SETUP_OFF 4 1748 #define HCI_QOS_SETUP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK) 1749 1750 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK 0x80 1751 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF 4 1752 #define HCI_ROLE_DISCOVERY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK) 1753 1754 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK 0x01 1755 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF 5 1756 #define HCI_SWITCH_ROLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK) 1757 1758 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK 0x02 1759 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF 5 1760 #define HCI_READ_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK) 1761 1762 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK 0x04 1763 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF 5 1764 #define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK) 1765 1766 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK 0x08 1767 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF 5 1768 #define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK) 1769 1770 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK 0x10 1771 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF 5 1772 #define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK) 1773 1774 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK 0x20 1775 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF 5 1776 #define HCI_FLOW_SPECIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK) 1777 1778 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK 0x40 1779 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF 5 1780 #define HCI_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK) 1781 1782 #define HCI_SUPP_COMMANDS_RESET_MASK 0x80 1783 #define HCI_SUPP_COMMANDS_RESET_OFF 5 1784 #define HCI_RESET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK) 1785 1786 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK 0x01 1787 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF 6 1788 #define HCI_SET_EVENT_FILTER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK) 1789 1790 #define HCI_SUPP_COMMANDS_FLUSH_MASK 0x02 1791 #define HCI_SUPP_COMMANDS_FLUSH_OFF 6 1792 #define HCI_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK) 1793 1794 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK 0x04 1795 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF 6 1796 #define HCI_READ_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK) 1797 1798 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK 0x08 1799 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF 6 1800 #define HCI_WRITE_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK) 1801 1802 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK 0x10 1803 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF 6 1804 #define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK) 1805 1806 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK 0x20 1807 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF 6 1808 #define HCI_READ_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK) 1809 1810 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK 0x40 1811 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF 6 1812 #define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK) 1813 1814 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK 0x80 1815 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF 6 1816 #define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK) 1817 1818 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK 0x01 1819 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF 7 1820 #define HCI_WRITE_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK) 1821 1822 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK 0x02 1823 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF 7 1824 #define HCI_READ_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK) 1825 1826 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK 0x04 1827 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF 7 1828 #define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK) 1829 1830 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK 0x08 1831 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF 7 1832 #define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK) 1833 1834 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK 0x10 1835 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF 7 1836 #define HCI_READ_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK) 1837 1838 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK 0x20 1839 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF 7 1840 #define HCI_WRITE_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK) 1841 1842 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK 0x40 1843 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF 7 1844 #define HCI_READ_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK) 1845 1846 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK 0x80 1847 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF 7 1848 #define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK) 1849 1850 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK 0x01 1851 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF 8 1852 #define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK) 1853 1854 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK 0x02 1855 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF 8 1856 #define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK) 1857 1858 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK 0x04 1859 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF 8 1860 #define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK) 1861 1862 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK 0x08 1863 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF 8 1864 #define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK) 1865 1866 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK 0x10 1867 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF 8 1868 #define HCI_READ_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK) 1869 1870 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK 0x20 1871 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF 8 1872 #define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK) 1873 1874 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK 0x40 1875 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF 8 1876 #define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK) 1877 1878 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK 0x80 1879 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF 8 1880 #define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK) 1881 1882 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK 0x01 1883 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF 9 1884 #define HCI_READ_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK) 1885 1886 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK 0x02 1887 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF 9 1888 #define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK) 1889 1890 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK 0x04 1891 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF 9 1892 #define HCI_READ_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK) 1893 1894 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK 0x08 1895 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF 9 1896 #define HCI_WRITE_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK) 1897 1898 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK 0x10 1899 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF 9 1900 #define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK) 1901 1902 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK 0x20 1903 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF 9 1904 #define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK) 1905 1906 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK 0x40 1907 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF 9 1908 #define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK) 1909 1910 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK 0x80 1911 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF 9 1912 #define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK) 1913 1914 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK 0x01 1915 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF 10 1916 #define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK) 1917 1918 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK 0x02 1919 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF 10 1920 #define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK) 1921 1922 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK 0x04 1923 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF 10 1924 #define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK) 1925 1926 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK 0x08 1927 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF 10 1928 #define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK) 1929 1930 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK 0x10 1931 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF 10 1932 #define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK) 1933 1934 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK 0x20 1935 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF 10 1936 #define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK) 1937 1938 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK 0x40 1939 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF 10 1940 #define HCI_HOST_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK) 1941 1942 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK 0x80 1943 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF 10 1944 #define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK) 1945 1946 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK 0x01 1947 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF 11 1948 #define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK) 1949 1950 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK 0x02 1951 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF 11 1952 #define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK) 1953 1954 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK 0x04 1955 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF 11 1956 #define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK) 1957 1958 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK 0x08 1959 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF 11 1960 #define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK) 1961 1962 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK 0x10 1963 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF 11 1964 #define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK) 1965 1966 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK 0x20 1967 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF 11 1968 #define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK) 1969 1970 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK 0x40 1971 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF 11 1972 #define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK) 1973 1974 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK 0x80 1975 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF 11 1976 #define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK) 1977 1978 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK 0x01 1979 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF 12 1980 #define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK) 1981 1982 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK 0x02 1983 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF 12 1984 #define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK) 1985 1986 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK 0x10 1987 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF 12 1988 #define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK) 1989 1990 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK 0x20 1991 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF 12 1992 #define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK) 1993 1994 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK 0x40 1995 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF 12 1996 #define HCI_READ_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK) 1997 1998 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK 0x80 1999 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF 12 2000 #define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK) 2001 2002 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK 0x01 2003 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF 13 2004 #define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK) 2005 2006 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK 0x02 2007 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF 13 2008 #define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK) 2009 2010 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK 0x04 2011 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF 13 2012 #define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK) 2013 2014 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK 0x08 2015 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF 13 2016 #define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK) 2017 2018 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK 0x08 2019 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF 14 2020 #define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK) 2021 2022 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK 0x10 2023 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF 14 2024 #define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK) 2025 2026 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK 0x20 2027 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF 14 2028 #define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK) 2029 2030 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK 0x40 2031 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF 14 2032 #define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK) 2033 2034 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK 0x80 2035 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF 14 2036 #define HCI_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK) 2037 2038 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK 0x01 2039 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF 15 2040 #define HCI_READ_COUNTRY_CODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK) 2041 2042 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK 0x02 2043 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF 15 2044 #define HCI_READ_BD_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK) 2045 2046 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK 0x04 2047 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF 15 2048 #define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK) 2049 2050 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK 0x08 2051 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF 15 2052 #define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK) 2053 2054 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK 0x10 2055 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF 15 2056 #define HCI_GET_LINK_QUALITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK) 2057 2058 #define HCI_SUPP_COMMANDS_READ_RSSI_MASK 0x20 2059 #define HCI_SUPP_COMMANDS_READ_RSSI_OFF 15 2060 #define HCI_READ_RSSI_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK) 2061 2062 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK 0x40 2063 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF 15 2064 #define HCI_READ_AFH_CH_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK) 2065 2066 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK 0x80 2067 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF 15 2068 #define HCI_READ_BD_CLOCK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK) 2069 2070 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK 0x01 2071 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF 16 2072 #define HCI_READ_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK) 2073 2074 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK 0x02 2075 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF 16 2076 #define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK) 2077 2078 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK 0x04 2079 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF 16 2080 #define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK) 2081 2082 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK 0x08 2083 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF 16 2084 #define HCI_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK) 2085 2086 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK 0x10 2087 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF 16 2088 #define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK) 2089 2090 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK 0x20 2091 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF 16 2092 #define HCI_REJECT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK) 2093 2094 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK 0x01 2095 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF 17 2096 #define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK) 2097 2098 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK 0x02 2099 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF 17 2100 #define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK) 2101 2102 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK 0x04 2103 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF 17 2104 #define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK) 2105 2106 /* Octet 17, bit 3 is reserved */ 2107 2108 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK 0x10 2109 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF 17 2110 #define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK) 2111 2112 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK 0x20 2113 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF 17 2114 #define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK) 2115 2116 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK 0x40 2117 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF 17 2118 #define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK) 2119 2120 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK 0x80 2121 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF 17 2122 #define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK) 2123 2124 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK 0x01 2125 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF 18 2126 #define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK) 2127 2128 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK 0x02 2129 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF 18 2130 #define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK) 2131 2132 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x04 2133 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2134 #define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2135 2136 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x08 2137 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2138 #define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2139 2140 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK 0x80 2141 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF 18 2142 #define HCI_IO_CAPABILITY_RESPONSE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK) 2143 2144 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK 0x01 2145 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF 19 2146 #define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK) 2147 2148 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK 0x02 2149 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF 19 2150 #define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK) 2151 2152 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK 0x04 2153 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF 19 2154 #define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK) 2155 2156 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK 0x08 2157 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF 19 2158 #define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK) 2159 2160 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK 0x10 2161 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF 19 2162 #define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK) 2163 2164 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK 0x20 2165 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF 19 2166 #define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK) 2167 2168 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK 0x40 2169 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF 19 2170 #define HCI_ENHANCED_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK) 2171 2172 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK 0x80 2173 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF 19 2174 #define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK) 2175 2176 /* Supported Commands (Byte 20) */ 2177 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK 0x04 2178 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF 20 2179 #define HCI_SEND_NOTIF_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK) 2180 2181 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK 0x08 2182 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF 20 2183 #define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK) 2184 2185 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK 0x10 2186 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF 20 2187 #define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK) 2188 2189 /* Supported Commands (Byte 21) */ 2190 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK 0x01 2191 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF 21 2192 #define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK) 2193 2194 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK 0x02 2195 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF 21 2196 #define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK) 2197 2198 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK 0x04 2199 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF 21 2200 #define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK) 2201 2202 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK 0x08 2203 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF 21 2204 #define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK) 2205 2206 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK 0x10 2207 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF 21 2208 #define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK) 2209 2210 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK 0x20 2211 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF 21 2212 #define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK) 2213 2214 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK 0x40 2215 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF 21 2216 #define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK) 2217 2218 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK 0x80 2219 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF 21 2220 #define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK) 2221 2222 /* Supported Commands (Byte 22) */ 2223 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x01 2224 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2225 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2226 2227 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x02 2228 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2229 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2230 2231 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK 0x04 2232 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF 22 2233 #define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK) 2234 2235 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK 0x08 2236 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF 22 2237 #define HCI_READ_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK) 2238 2239 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK 0x10 2240 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF 22 2241 #define HCI_WRITE_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK) 2242 2243 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK 0x20 2244 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF 22 2245 #define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK) 2246 2247 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK 0x40 2248 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF 22 2249 #define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK) 2250 2251 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK 0x80 2252 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF 22 2253 #define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK) 2254 2255 /* Supported Commands (Byte 23) */ 2256 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK 0x01 2257 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF 23 2258 #define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK) 2259 2260 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK 0x02 2261 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF 23 2262 #define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK) 2263 2264 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK 0x04 2265 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF 23 2266 #define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK) 2267 2268 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK 0x20 2269 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF 23 2270 #define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK) 2271 2272 #define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK 0x40 2273 #define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF 23 2274 #define HCI_AMP_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK) 2275 2276 #define HCI_SUPP_COMMANDS_AMP_TEST_MASK 0x80 2277 #define HCI_SUPP_COMMANDS_AMP_TEST_OFF 23 2278 #define HCI_AMP_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK) 2279 2280 /* Supported Commands (Byte 24) */ 2281 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK 0x01 2282 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF 24 2283 #define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK) 2284 2285 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK 0x04 2286 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF 24 2287 #define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK) 2288 2289 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK 0x08 2290 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF 24 2291 #define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK) 2292 2293 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK 0x10 2294 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF 24 2295 #define HCI_SHORT_RANGE_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK) 2296 2297 /* LE commands TBD 2298 ** Supported Commands (Byte 24 continued) 2299 ** Supported Commands (Byte 25) 2300 ** Supported Commands (Byte 26) 2301 ** Supported Commands (Byte 27) 2302 ** Supported Commands (Byte 28) 2303 */ 2304 2305 /* Supported Commands (Byte 29) */ 2306 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK 0x08 2307 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF 29 2308 #define HCI_READ_ENH_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK) 2309 2310 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK 0x10 2311 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF 29 2312 #define HCI_READ_ENH_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK) 2313 2314 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK 0x20 2315 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF 29 2316 #define HCI_READ_LOCAL_CODECS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK) 2317 2318 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK 0x40 2319 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF 29 2320 #define HCI_SET_MWS_CHANNEL_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF] & HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK) 2321 2322 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK 0x80 2323 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF 29 2324 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF] & HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK) 2325 2326 2327 /* Supported Commands (Byte 30) */ 2328 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK 0x01 2329 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF 30 2330 #define HCI_SET_MWS_SIGNALING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK) 2331 2332 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK 0x02 2333 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF 30 2334 #define HCI_SET_MWS_TRANSPORT_LAYER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF] & HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK) 2335 2336 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK 0x04 2337 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF 30 2338 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK) 2339 2340 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK 0x08 2341 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF 30 2342 #define HCI_GET_MWS_TRANS_LAYER_CFG_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF] & HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK) 2343 2344 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK 0x10 2345 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF 30 2346 #define HCI_SET_MWS_PATTERN_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF] & HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK) 2347 2348 /* Supported Commands (Byte 30 bit 5) */ 2349 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK 0x20 2350 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF 30 2351 #define HCI_SET_TRIG_CLK_CAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF] & HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK) 2352 2353 2354 /* Supported Commands (Byte 30 bit 6-7) */ 2355 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE 0x06 2356 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF 30 2357 #define HCI_TRUNCATED_PAGE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE) 2358 2359 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL 0x07 2360 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF 30 2361 #define HCI_TRUNCATED_PAGE_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL) 2362 2363 /* Supported Commands (Byte 31 bit 6-7) */ 2364 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST 0x00 2365 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF 31 2366 #define HCI_SET_CONLESS_SLAVE_BRCST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST) 2367 2368 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE 0x01 2369 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF 31 2370 #define HCI_SET_CONLESS_SLAVE_BRCST_RECEIVE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE) 2371 2372 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN 0x02 2373 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF 31 2374 #define HCI_START_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_START_SYNC_TRAIN) 2375 2376 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN 0x03 2377 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF 31 2378 #define HCI_RECEIVE_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN) 2379 2380 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR 0x04 2381 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF 31 2382 #define HCI_SET_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR) 2383 2384 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR 0x05 2385 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF 31 2386 #define HCI_DELETE_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR) 2387 2388 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA 0x06 2389 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF 31 2390 #define HCI_SET_CONLESS_SLAVE_BRCST_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA) 2391 2392 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM 0x07 2393 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF 31 2394 #define HCI_READ_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM) 2395 2396 /* Supported Commands (Byte 32 bit 0) */ 2397 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM 0x00 2398 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF 32 2399 #define HCI_WRITE_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM) 2400 2401 2402 2403 2404 /* 2405 Commands of HCI_GRP_VENDOR_SPECIFIC group for WIDCOMM SW LM Simulator 2406 */ 2407 #ifdef _WIDCOMM 2408 2409 #define HCI_SET_HCI_TRACE (0x0001 | HCI_GRP_VENDOR_SPECIFIC) 2410 #define HCI_SET_LM_TRACE (0x0002 | HCI_GRP_VENDOR_SPECIFIC) 2411 #define HCI_WRITE_COUNTRY_CODE (0x0004 | HCI_GRP_VENDOR_SPECIFIC) 2412 #define HCI_READ_LM_HISTORY (0x0005 | HCI_GRP_VENDOR_SPECIFIC) 2413 #define HCI_WRITE_BD_ADDR (0x0006 | HCI_GRP_VENDOR_SPECIFIC) 2414 #define HCI_DISABLE_ENCRYPTION (0x0007 | HCI_GRP_VENDOR_SPECIFIC) 2415 #define HCI_DISABLE_AUTHENTICATION (0x0008 | HCI_GRP_VENDOR_SPECIFIC) 2416 #define HCI_GENERIC_LC_CMD (0x000A | HCI_GRP_VENDOR_SPECIFIC) 2417 #define HCI_INCR_POWER (0x000B | HCI_GRP_VENDOR_SPECIFIC) 2418 #define HCI_DECR_POWER (0x000C | HCI_GRP_VENDOR_SPECIFIC) 2419 2420 /* Definitions for the local transactions */ 2421 #define LM_DISCONNECT (0x00D0 | HCI_GRP_VENDOR_SPECIFIC) 2422 #define LM_AUTHENTICATION_REQUESTED (0x00D1 | HCI_GRP_VENDOR_SPECIFIC) 2423 #define LM_SET_CONN_ENCRYPTION (0x00D2 | HCI_GRP_VENDOR_SPECIFIC) 2424 #define LM_START_ENCRYPT_KEY_SIZE (0x00D3 | HCI_GRP_VENDOR_SPECIFIC) 2425 #define LM_START_ENCRYPTION (0x00D4 | HCI_GRP_VENDOR_SPECIFIC) 2426 #define LM_STOP_ENCRYPTION (0x00D5 | HCI_GRP_VENDOR_SPECIFIC) 2427 #define LM_CHANGE_CONN_PACKET_TYPE (0x00D6 | HCI_GRP_VENDOR_SPECIFIC) 2428 #define LM_RMT_NAME_REQUEST (0x00D7 | HCI_GRP_VENDOR_SPECIFIC) 2429 #define LM_READ_RMT_FEATURES (0x00D8 | HCI_GRP_VENDOR_SPECIFIC) 2430 #define LM_READ_RMT_VERSION_INFO (0x00D9 | HCI_GRP_VENDOR_SPECIFIC) 2431 #define LM_READ_RMT_TIMING_INFO (0x00DA | HCI_GRP_VENDOR_SPECIFIC) 2432 #define LM_READ_RMT_CLOCK_OFFSET (0x00DB | HCI_GRP_VENDOR_SPECIFIC) 2433 #define LM_HOLD_MODE (0x00DC | HCI_GRP_VENDOR_SPECIFIC) 2434 #define LM_EXIT_PARK_MODE (0x00DD | HCI_GRP_VENDOR_SPECIFIC) 2435 2436 #define LM_SCO_LINK_REQUEST (0x00E0 | HCI_GRP_VENDOR_SPECIFIC) 2437 #define LM_SCO_CHANGE (0x00E4 | HCI_GRP_VENDOR_SPECIFIC) 2438 #define LM_SCO_REMOVE (0x00E8 | HCI_GRP_VENDOR_SPECIFIC) 2439 #define LM_MAX_SLOTS (0x00F1 | HCI_GRP_VENDOR_SPECIFIC) 2440 #define LM_MAX_SLOTS_REQUEST (0x00F2 | HCI_GRP_VENDOR_SPECIFIC) 2441 2442 #ifdef INCLUDE_OPTIONAL_PAGING_SCHEME 2443 #define LM_OPTIONAL_PAGE_REQUEST (0x00F3 | HCI_GRP_VENDOR_SPECIFIC) 2444 #define LM_OPTIONAL_PAGESCAN_REQUEST (0x00F4 | HCI_GRP_VENDOR_SPECIFIC) 2445 #endif 2446 2447 #define LM_SETUP_COMPLETE (0x00FF | HCI_GRP_VENDOR_SPECIFIC) 2448 2449 #define LM_HIST_SEND_LMP_FRAME (0x0100 | HCI_GRP_VENDOR_SPECIFIC) 2450 #define LM_HIST_RECV_LMP_FRAME (0x0101 | HCI_GRP_VENDOR_SPECIFIC) 2451 #define LM_HIST_HCIT_ERROR (0x0102 | HCI_GRP_VENDOR_SPECIFIC) 2452 #define LM_HIST_PER_INQ_TOUT (0x0103 | HCI_GRP_VENDOR_SPECIFIC) 2453 #define LM_HIST_INQ_SCAN_TOUT (0x0104 | HCI_GRP_VENDOR_SPECIFIC) 2454 #define LM_HIST_PAGE_SCAN_TOUT (0x0105 | HCI_GRP_VENDOR_SPECIFIC) 2455 #define LM_HIST_RESET_TOUT (0x0106 | HCI_GRP_VENDOR_SPECIFIC) 2456 #define LM_HIST_MANDAT_PSCAN_TOUT (0x0107 | HCI_GRP_VENDOR_SPECIFIC) 2457 #define LM_HIST_ACL_START_TRANS (0x0108 | HCI_GRP_VENDOR_SPECIFIC) 2458 #define LM_HIST_ACL_HOST_REPLY (0x0109 | HCI_GRP_VENDOR_SPECIFIC) 2459 #define LM_HIST_ACL_TIMEOUT (0x010A | HCI_GRP_VENDOR_SPECIFIC) 2460 #define LM_HIST_ACL_TX_COMP (0x010B | HCI_GRP_VENDOR_SPECIFIC) 2461 #define LM_HIST_ACL_HCID_SUSPENDED (0x010C | HCI_GRP_VENDOR_SPECIFIC) 2462 #define LM_HIST_ACL_FAILED (0x010D | HCI_GRP_VENDOR_SPECIFIC) 2463 #define LM_HIST_HCI_COMMAND (0x010E | HCI_GRP_VENDOR_SPECIFIC) 2464 2465 #define LM_HIST_HCI_EVENT (0x010F | HCI_GRP_VENDOR_SPECIFIC) 2466 #define LM_HIST_HCI_UPDATA (0x0110 | HCI_GRP_VENDOR_SPECIFIC) 2467 #define LM_HIST_HCI_DNDATA (0x0111 | HCI_GRP_VENDOR_SPECIFIC) 2468 2469 #define HCI_ENTER_TEST_MODE (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2470 #define HCI_LMP_TEST_CNTRL (0x0301 | HCI_GRP_VENDOR_SPECIFIC) 2471 #define HCI_DEBUG_LC_CMD_MIN (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2472 #define HCI_DEBUG_LC_CMD_MAX (0x03FF | HCI_GRP_VENDOR_SPECIFIC) 2473 #define HCI_DEBUG_LC_COMMAND HCI_DEBUG_LC_CMD_MAX 2474 2475 #endif 2476 2477 2478 /* AMP VSE events 2479 */ 2480 #define AMP_VSE_CHANSPEC_CHAN_MASK 0x00ff 2481 2482 #define AMP_VSE_CHANSPEC_CTL_SB_MASK 0x0300 2483 #define AMP_VSE_CHANSPEC_CTL_SB_LOWER 0x0100 2484 #define AMP_VSE_CHANSPEC_CTL_SB_UPPER 0x0200 2485 #define AMP_VSE_CHANSPEC_CTL_SB_NONE 0x0300 2486 2487 #define AMP_VSE_CHANSPEC_BW_MASK 0x0C00 2488 #define AMP_VSE_CHANSPEC_BW_10 0x0400 2489 #define AMP_VSE_CHANSPEC_BW_20 0x0800 2490 #define AMP_VSE_CHANSPEC_BW_40 0x0C00 2491 2492 #define AMP_VSE_CHANSPEC_BAND_MASK 0xf000 2493 #define AMP_VSE_CHANSPEC_BAND_5G 0x1000 2494 #define AMP_VSE_CHANSPEC_BAND_2G 0x2000 2495 2496 2497 #endif 2498 2499
