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      1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file declares the machine register scavenger class. It can provide
     11 // information such as unused register at any point in a machine basic block.
     12 // It also provides a mechanism to make registers availbale by evicting them
     13 // to spill slots.
     14 //
     15 //===----------------------------------------------------------------------===//
     16 
     17 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
     18 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
     19 
     20 #include "llvm/ADT/BitVector.h"
     21 #include "llvm/CodeGen/MachineBasicBlock.h"
     22 #include "llvm/CodeGen/MachineRegisterInfo.h"
     23 
     24 namespace llvm {
     25 
     26 class MachineRegisterInfo;
     27 class TargetRegisterInfo;
     28 class TargetInstrInfo;
     29 class TargetRegisterClass;
     30 
     31 class RegScavenger {
     32   const TargetRegisterInfo *TRI;
     33   const TargetInstrInfo *TII;
     34   MachineRegisterInfo* MRI;
     35   MachineBasicBlock *MBB;
     36   MachineBasicBlock::iterator MBBI;
     37   unsigned NumPhysRegs;
     38 
     39   /// Tracking - True if RegScavenger is currently tracking the liveness of
     40   /// registers.
     41   bool Tracking;
     42 
     43   /// Information on scavenged registers (held in a spill slot).
     44   struct ScavengedInfo {
     45     ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(NULL) {}
     46 
     47     /// A spill slot used for scavenging a register post register allocation.
     48     int FrameIndex;
     49 
     50     /// If non-zero, the specific register is currently being
     51     /// scavenged. That is, it is spilled to this scavenging stack slot.
     52     unsigned Reg;
     53 
     54     /// The instruction that restores the scavenged register from stack.
     55     const MachineInstr *Restore;
     56   };
     57 
     58   /// A vector of information on scavenged registers.
     59   SmallVector<ScavengedInfo, 2> Scavenged;
     60 
     61   /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
     62   ///
     63   BitVector CalleeSavedRegs;
     64 
     65   /// RegsAvailable - The current state of all the physical registers immediately
     66   /// before MBBI. One bit per physical register. If bit is set that means it's
     67   /// available, unset means the register is currently being used.
     68   BitVector RegsAvailable;
     69 
     70   // These BitVectors are only used internally to forward(). They are members
     71   // to avoid frequent reallocations.
     72   BitVector KillRegs, DefRegs;
     73 
     74 public:
     75   RegScavenger()
     76     : MBB(NULL), NumPhysRegs(0), Tracking(false) {}
     77 
     78   /// enterBasicBlock - Start tracking liveness from the begin of the specific
     79   /// basic block.
     80   void enterBasicBlock(MachineBasicBlock *mbb);
     81 
     82   /// initRegState - allow resetting register state info for multiple
     83   /// passes over/within the same function.
     84   void initRegState();
     85 
     86   /// forward - Move the internal MBB iterator and update register states.
     87   void forward();
     88 
     89   /// forward - Move the internal MBB iterator and update register states until
     90   /// it has processed the specific iterator.
     91   void forward(MachineBasicBlock::iterator I) {
     92     if (!Tracking && MBB->begin() != I) forward();
     93     while (MBBI != I) forward();
     94   }
     95 
     96   /// Invert the behavior of forward() on the current instruction (undo the
     97   /// changes to the available registers made by forward()).
     98   void unprocess();
     99 
    100   /// Unprocess instructions until you reach the provided iterator.
    101   void unprocess(MachineBasicBlock::iterator I) {
    102     while (MBBI != I) unprocess();
    103   }
    104 
    105   /// skipTo - Move the internal MBB iterator but do not update register states.
    106   void skipTo(MachineBasicBlock::iterator I) {
    107     if (I == MachineBasicBlock::iterator(NULL))
    108       Tracking = false;
    109     MBBI = I;
    110   }
    111 
    112   MachineBasicBlock::iterator getCurrentPosition() const {
    113     return MBBI;
    114   }
    115 
    116   /// getRegsUsed - return all registers currently in use in used.
    117   void getRegsUsed(BitVector &used, bool includeReserved);
    118 
    119   /// getRegsAvailable - Return all available registers in the register class
    120   /// in Mask.
    121   BitVector getRegsAvailable(const TargetRegisterClass *RC);
    122 
    123   /// FindUnusedReg - Find a unused register of the specified register class.
    124   /// Return 0 if none is found.
    125   unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
    126 
    127   /// Add a scavenging frame index.
    128   void addScavengingFrameIndex(int FI) {
    129     Scavenged.push_back(ScavengedInfo(FI));
    130   }
    131 
    132   /// Query whether a frame index is a scavenging frame index.
    133   bool isScavengingFrameIndex(int FI) const {
    134     for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
    135          IE = Scavenged.end(); I != IE; ++I)
    136       if (I->FrameIndex == FI)
    137         return true;
    138 
    139     return false;
    140   }
    141 
    142   /// Get an array of scavenging frame indices.
    143   void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
    144     for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
    145          IE = Scavenged.end(); I != IE; ++I)
    146       if (I->FrameIndex >= 0)
    147         A.push_back(I->FrameIndex);
    148   }
    149 
    150   /// scavengeRegister - Make a register of the specific register class
    151   /// available and do the appropriate bookkeeping. SPAdj is the stack
    152   /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
    153   /// Returns the scavenged register.
    154   unsigned scavengeRegister(const TargetRegisterClass *RegClass,
    155                             MachineBasicBlock::iterator I, int SPAdj);
    156   unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
    157     return scavengeRegister(RegClass, MBBI, SPAdj);
    158   }
    159 
    160   /// setUsed - Tell the scavenger a register is used.
    161   ///
    162   void setUsed(unsigned Reg);
    163 private:
    164   /// isReserved - Returns true if a register is reserved. It is never "unused".
    165   bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
    166 
    167   /// isUsed - Test if a register is currently being used.  When called by the
    168   /// isAliasUsed function, we only check isReserved if this is the original
    169   /// register, not an alias register.
    170   ///
    171   bool isUsed(unsigned Reg, bool CheckReserved = true) const   {
    172     return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg));
    173   }
    174 
    175   /// isAliasUsed - Is Reg or an alias currently in use?
    176   bool isAliasUsed(unsigned Reg) const;
    177 
    178   /// setUsed / setUnused - Mark the state of one or a number of registers.
    179   ///
    180   void setUsed(BitVector &Regs) {
    181     RegsAvailable.reset(Regs);
    182   }
    183   void setUnused(BitVector &Regs) {
    184     RegsAvailable |= Regs;
    185   }
    186 
    187   /// Processes the current instruction and fill the KillRegs and DefRegs bit
    188   /// vectors.
    189   void determineKillsAndDefs();
    190 
    191   /// Add Reg and all its sub-registers to BV.
    192   void addRegWithSubRegs(BitVector &BV, unsigned Reg);
    193 
    194   /// findSurvivorReg - Return the candidate register that is unused for the
    195   /// longest after StartMI. UseMI is set to the instruction where the search
    196   /// stopped.
    197   ///
    198   /// No more than InstrLimit instructions are inspected.
    199   unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
    200                            BitVector &Candidates,
    201                            unsigned InstrLimit,
    202                            MachineBasicBlock::iterator &UseMI);
    203 
    204 };
    205 
    206 } // End llvm namespace
    207 
    208 #endif
    209