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    Searched defs:SR (Results 1 - 25 of 37) sorted by null

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  /external/valgrind/main/coregrind/m_syswrap/
priv_syswrap-linux-variants.h 44 #define SR SysRes
53 #undef SR
priv_syswrap-linux.h 283 #define SR SysRes
291 extern void ML_(linux_POST_sys_getsockopt) ( TId, SR, UW, UW, UW, UW, UW );
295 #undef SR
priv_syswrap-generic.h 218 #define SR SysRes
221 extern SysRes ML_(generic_POST_sys_socketpair) ( TId, SR, UW, UW, UW, UW );
222 extern SysRes ML_(generic_POST_sys_socket) ( TId, SR );
225 extern SysRes ML_(generic_POST_sys_accept) ( TId, SR, UW, UW, UW );
229 extern void ML_(generic_POST_sys_recvfrom) ( TId, SR, UW, UW, UW, UW, UW, UW );
235 extern void ML_(generic_POST_sys_getsockname) ( TId, SR, UW, UW, UW );
237 extern void ML_(generic_POST_sys_getpeername) ( TId, SR, UW, UW, UW );
277 #undef SR
  /external/clang/lib/StaticAnalyzer/Checkers/
CastSizeChecker.cpp 52 const SymbolicRegion *SR = dyn_cast<SymbolicRegion>(R);
53 if (SR == 0)
57 SVal extent = SR->getExtent(svalBuilder);
UnreachableCodeChecker.cpp 147 SourceRange SR;
151 SR = S->getSourceRange();
154 if (SR.isInvalid() || !SL.isValid())
166 "This statement is never executed", DL, SR);
  /external/elfutils/backends/
i386_corenote.c 44 #define SR(at, n, dwreg) \
52 SR (7, 1, 43), /* %ds */
53 SR (8, 1, 40), /* %es */
54 SR (9, 1, 44), /* %fs */
55 SR (10, 1, 45), /* %gs */
58 SR (13, 1, 41), /* %cs */
61 SR (16, 1, 42), /* %ss */
64 #undef SR
x86_64_corenote.c 44 #define SR(at, n, dwreg) \
63 SR (17,1, 51), /* %cs */
66 SR (20,1, 52), /* %ss */
68 SR (23,1, 53), /* %ds */
69 SR (24,1, 50), /* %es */
70 SR (25,2, 54), /* %fs-%gs */
73 #undef SR
  /external/clang/tools/libclang/
CXLoadedDiagnostic.cpp 230 CXSourceRange &SR);
511 CXSourceRange &SR) {
523 SR = clang_getRange(startLoc, endLoc);
613 CXSourceRange SR;
614 if (readRange(TopDiags, Record, 0, SR))
616 D->Ranges.push_back(SR);
621 CXSourceRange SR;
622 if (readRange(TopDiags, Record, 0, SR))
628 D->FixIts.push_back(std::make_pair(SR, RetStr));
  /bionic/libc/arch-mips/include/machine/
regnum.h 68 #define SR 32
69 #define PS SR /* alias for SR */
  /development/ndk/platforms/android-9/arch-mips/include/machine/
regnum.h 68 #define SR 32
69 #define PS SR /* alias for SR */
  /external/llvm/tools/llvm-objdump/
MachODump.cpp 164 SectionRef SR = *SI;
166 SR.getName(SectName);
  /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/
regnum.h 68 #define SR 32
69 #define PS SR /* alias for SR */
  /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/
regnum.h 68 #define SR 32
69 #define PS SR /* alias for SR */
  /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/machine/
regnum.h 68 #define SR 32
69 #define PS SR /* alias for SR */
  /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/machine/
regnum.h 68 #define SR 32
69 #define PS SR /* alias for SR */
  /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/machine/
regnum.h 68 #define SR 32
69 #define PS SR /* alias for SR */
  /external/clang/lib/StaticAnalyzer/Core/
CheckerManager.cpp 422 SymbolReaper &SR;
430 CheckDeadSymbolsContext(const CheckersTy &checkers, SymbolReaper &sr,
433 : Checkers(checkers), SR(sr), S(s), Eng(eng), ProgarmPointKind(K) { }
444 checkFn(SR, C);
MemRegion.cpp 154 if (const SubRegion* sr = dyn_cast<SubRegion>(r))
155 r = sr->getSuperRegion();
166 if (const SubRegion *sr = dyn_cast<SubRegion>(superRegion)) {
167 r = sr;
    [all...]
RegionStore.cpp     [all...]
  /external/llvm/lib/Transforms/Utils/
IntegerDivision.cpp 201 // ; %sr = sub nsw i32 %tmp0, %tmp1
202 // ; %ret0_4 = icmp ugt i32 %sr, 31
204 // ; %retDividend = icmp eq i32 %sr, 31
214 Value *SR = Builder.CreateSub(Tmp0, Tmp1);
215 Value *Ret0_4 = Builder.CreateICmpUGT(SR, ThirtyOne);
217 Value *RetDividend = Builder.CreateICmpEQ(SR, ThirtyOne);
223 // ; %sr_1 = add i32 %sr, 1
224 // ; %tmp2 = sub i32 31, %sr
229 Value *SR_1 = Builder.CreateAdd(SR, One);
230 Value *Tmp2 = Builder.CreateSub(ThirtyOne, SR);
    [all...]
  /external/llvm/utils/TableGen/
RegisterInfoEmitter.cpp 737 SetVector<const CodeGenRegister*> SR;
738 Reg->addSubRegsPreOrder(SR, RegBank);
739 diffEncode(SubRegLists[i], Reg->EnumValue, SR.begin(), SR.end());
744 for (unsigned j = 0, je = SR.size(); j != je; ++j)
745 SRIs.push_back(Reg->getSubRegIndex(SR[j]));
    [all...]
  /external/clang/test/SemaCXX/
overload-call.cpp 296 struct SR {
297 SR(const string&);
300 void f(SR) { }
  /external/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp     [all...]
  /libcore/luni/src/test/java/libcore/java/util/
EnumSetTest.java 103 FE, CO, NI, CU, ZN, GA, GE, AS, SE, BR, KR, RB, SR, Y, ZR, NB, MO, TC, RU, RH, PD, AG, CD,
  /external/llvm/lib/Target/Hexagon/
HexagonHardwareLoops.cpp 758 unsigned R = 0, SR = 0;
761 SR = Start->getSubReg();
764 SR = End->getSubReg();
769 if (!SR && RC == &Hexagon::DoubleRegsRegClass)
    [all...]

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