| /external/llvm/lib/Target/SystemZ/ |
| SystemZElimCompare.cpp | 208 .addReg(SystemZ::CC, RegState::ImplicitDefine);
222 .addReg(SystemZ::CC, RegState::ImplicitDefine);
412 .addReg(SystemZ::CC, RegState::ImplicitDefine);
|
| SystemZFrameLowering.cpp | 260 MIB.addReg(Reg, RegState::ImplicitDefine);
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 40 ImplicitDefine = Implicit | Define,
|
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 428 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
570 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead));
[all...] |
| Thumb2InstrInfo.cpp | 205 MIB.addReg(DestReg, RegState::ImplicitDefine);
|
| ARMFrameLowering.cpp | [all...] |
| ARMBaseInstrInfo.cpp | [all...] |
| ARMLoadStoreOptimizer.cpp | 358 MIB.addReg(ImpDefs[i], RegState::ImplicitDefine);
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| PostRASchedulerList.cpp | 457 MIB.addReg(*SubRegs, RegState::ImplicitDefine);
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelDAGToDAG.cpp | 48 unsigned Flag = IsDef ? RegState::ImplicitDefine : RegState::Implicit;
|
| MipsSEInstrInfo.cpp | 134 .addReg(DestReg, RegState::ImplicitDefine);
|
| /external/llvm/lib/Target/X86/ |
| X86FloatingPoint.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| X86InstrInfo.cpp | [all...] |
