| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 641 /// MemIndexedMode enum - This enum defines the load / store indexed
668 enum MemIndexedMode {
[all...] |
| SelectionDAGNodes.h | 631 static const char* getIndexedModeName(ISD::MemIndexedMode AM);
[all...] |
| SelectionDAG.h | 717 SDValue Offset, ISD::MemIndexedMode AM);
718 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
725 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
746 SDValue Offset, ISD::MemIndexedMode AM);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 150 ISD::MemIndexedMode &AM,
|
| HexagonISelDAGToDAG.cpp | 678 ISD::MemIndexedMode AM = LD->getAddressingMode();
818 ISD::MemIndexedMode AM = ST->getAddressingMode();
[all...] |
| HexagonISelLowering.cpp | 642 ISD::MemIndexedMode &AM,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 171 ISD::MemIndexedMode &AM,
|
| MSP430ISelDAGToDAG.cpp | 304 ISD::MemIndexedMode AM = LD->getAddressingMode();
|
| MSP430ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 326 ISD::MemIndexedMode &AM,
334 ISD::MemIndexedMode &AM,
|
| ARMISelDAGToDAG.cpp | 817 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
853 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
873 ISD::MemIndexedMode AM = (Opcode == ISD::LOAD)
[all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 356 ISD::MemIndexedMode &AM,
|
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 316 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
|
| SelectionDAG.cpp | 510 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | [all...] |
