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Searched
refs:NumLoads
(Results
1 - 15
of
15
) sorted by null
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
AMDGPUInstrInfo.cpp
189
unsigned
NumLoads
) const {
195
return (
NumLoads
< 16 && (Offset2 - Offset1) < 16);
AMDGPUInstrInfo.h
111
unsigned
NumLoads
) const;
/external/llvm/lib/Target/R600/
AMDGPUInstrInfo.cpp
169
unsigned
NumLoads
) const {
175
return (
NumLoads
< 16 && (Offset2 - Offset1) < 16);
AMDGPUInstrInfo.h
113
unsigned
NumLoads
) const;
/external/mesa3d/src/gallium/drivers/radeon/
AMDGPUInstrInfo.cpp
189
unsigned
NumLoads
) const {
195
return (
NumLoads
< 16 && (Offset2 - Offset1) < 16);
AMDGPUInstrInfo.h
111
unsigned
NumLoads
) const;
/external/llvm/include/llvm/Target/
TargetInstrInfo.h
603
/// to schedule the two loads together. "
NumLoads
" is the number of loads that
607
unsigned
NumLoads
) const {
620
unsigned
NumLoads
) const {
[
all
...]
/external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGSDNodes.cpp
250
unsigned
NumLoads
= 0;
257
if (!TII->shouldScheduleLoadsNear(BaseLoad, Load, BaseOff, Offset,
NumLoads
))
260
++
NumLoads
;
263
if (
NumLoads
== 0)
[
all
...]
/external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.h
160
/// to schedule the two loads together. "
NumLoads
" is the number of loads that
164
unsigned
NumLoads
) const;
ARMBaseInstrInfo.cpp
[
all
...]
/external/llvm/lib/Target/X86/
X86InstrInfo.h
336
/// to schedule the two loads together. "
NumLoads
" is the number of loads that
340
unsigned
NumLoads
) const;
X86InstrInfo.cpp
[
all
...]
X86ISelLowering.cpp
[
all
...]
/external/llvm/lib/CodeGen/
RegAllocFast.cpp
42
STATISTIC(
NumLoads
, "Number of loads added");
627
++
NumLoads
;
[
all
...]
/external/llvm/utils/TableGen/
CodeGenDAGPatterns.cpp
[
all
...]
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