| /external/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.cpp | 44 .addReg(SrcReg, getKillRegState(KillSrc));
47 .addReg(SrcReg, getKillRegState(KillSrc));
50 .addReg(SrcReg, getKillRegState(KillSrc));
53 .addReg(SrcReg, getKillRegState(KillSrc));
56 .addReg(SrcReg, getKillRegState(KillSrc));
59 .addReg(SrcReg, getKillRegState(KillSrc));
|
| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 109 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
117 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1)
118 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0);
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1InstrInfo.cpp | 46 .addReg(SrcReg, getKillRegState(KillSrc)));
74 .addReg(SrcReg, getKillRegState(isKill))
|
| MLxExpansionPass.cpp | 293 .addReg(Src1Reg, getKillRegState(Src1Kill))
294 .addReg(Src2Reg, getKillRegState(Src2Kill));
304 MIB.addReg(TmpReg, getKillRegState(true))
305 .addReg(AccReg, getKillRegState(AccKill));
307 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true));
|
| ARMLoadStoreOptimizer.cpp | 339 .addReg(Base, getKillRegState(BaseKill)).addImm(Offset)
350 .addReg(Base, getKillRegState(BaseKill))
354 | getKillRegState(Regs[i].second));
779 .addReg(Base, getKillRegState(BaseKill))
932 .addReg(Base, getKillRegState(isLd ? BaseKill : false))
935 getKillRegState(MO.isKill())));
[all...] |
| Thumb2InstrInfo.cpp | 122 .addReg(SrcReg, getKillRegState(KillSrc)));
145 .addReg(SrcReg, getKillRegState(isKill))
158 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
|
| ARMBaseInstrInfo.cpp | 652 .addReg(SrcReg, getKillRegState(KillSrc))));
673 MIB.addReg(SrcReg, getKillRegState(KillSrc));
675 MIB.addReg(SrcReg, getKillRegState(KillSrc));
777 .addReg(SrcReg, getKillRegState(isKill))
781 .addReg(SrcReg, getKillRegState(isKill))
789 .addReg(SrcReg, getKillRegState(isKill))
794 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
805 AddDReg(MIB, SrcReg, ARM::gsub_0, getKillRegState(isKill), TRI);
817 .addReg(SrcReg, getKillRegState(isKill))
821 .addReg(SrcReg, getKillRegState(isKill)
[all...] |
| ARMExpandPseudoInsts.cpp | 548 getKillRegState(MO.isKill()));
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIInstrInfo.cpp | 49 .addReg(SrcReg, getKillRegState(KillSrc));
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIInstrInfo.cpp | 49 .addReg(SrcReg, getKillRegState(KillSrc));
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 278 .addReg(SrcReg, getKillRegState(KillSrc));
281 .addReg(SrcReg, getKillRegState(KillSrc));
285 .addReg(SrcReg, getKillRegState(KillSrc));
326 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
329 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
332 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
335 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
|
| /external/llvm/lib/Target/R600/ |
| SIInstrInfo.cpp | 95 .addReg(SrcReg, getKillRegState(KillSrc));
101 .addReg(SrcReg, getKillRegState(KillSrc));
123 .addReg(SrcReg, getKillRegState(KillSrc));
163 Builder.addReg(RI.getSubReg(SrcReg, SubIdx), getKillRegState(KillSrc));
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 178 .addReg(Reg, getKillRegState(isKill))
199 .addReg(Reg, getKillRegState(isKill))
228 .addReg(Reg, getKillRegState(isKill))
|
| XCoreInstrInfo.cpp | 343 .addReg(SrcReg, getKillRegState(KillSrc))
355 .addReg(SrcReg, getKillRegState(KillSrc));
371 .addReg(SrcReg, getKillRegState(isKill))
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 53 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
57 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
101 .addReg(SrcReg, getKillRegState(KillSrc));
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonNewValueJump.cpp | 612 .addReg(cmpReg1, getKillRegState(MO1IsKill))
613 .addReg(cmpOp2, getKillRegState(MO2IsKill))
623 .addReg(cmpReg1, getKillRegState(MO1IsKill))
629 .addReg(cmpReg1, getKillRegState(MO1IsKill))
|
| HexagonCopyToCombine.cpp | 610 unsigned LoRegKillFlag = getKillRegState(LoOperand.isKill());
634 unsigned HiRegKillFlag = getKillRegState(HiOperand.isKill());
660 unsigned LoRegKillFlag = getKillRegState(LoOperand.isKill());
661 unsigned HiRegKillFlag = getKillRegState(HiOperand.isKill());
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 197 .addReg(Reg2, getKillRegState(Reg2IsKill))
198 .addReg(Reg1, getKillRegState(Reg1IsKill))
553 .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc));
555 BuildMI(MBB, I, DL, MCID, DestReg).addReg(SrcReg, getKillRegState(KillSrc));
573 getKillRegState(isKill)),
578 getKillRegState(isKill)),
583 getKillRegState(isKill)),
588 getKillRegState(isKill)),
593 getKillRegState(isKill)),
633 getKillRegState(isKill))
[all...] |
| PPCRegisterInfo.cpp | 317 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg))
325 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg));
342 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg))
350 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg));
388 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
469 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
|
| PPCFrameLowering.cpp | 444 .addReg(PPC::X12, getKillRegState(true))
853 .addReg(PPC::X12, getKillRegState(i == e-1));
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 114 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc));
133 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1 << 4)
171 MIB.addReg(SrcReg, getKillRegState(KillSrc));
208 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))
409 unsigned KillSrc = getKillRegState(Src.isKill());
|
| Mips16InstrInfo.cpp | 97 MIB.addReg(SrcReg, getKillRegState(KillSrc));
112 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)).
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 469 StLow = getKillRegState(determinePrologueDeath(MBB, CSI[i+1].getReg()));
470 StHigh = getKillRegState(determinePrologueDeath(MBB, CSI[i].getReg()));
485 State = getKillRegState(determinePrologueDeath(MBB, CSI[i].getReg()));
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 382 .addReg(SrcReg, getKillRegState(KillSrc));
399 .addReg(SrcReg, getKillRegState(isKill)), FrameIdx);
493 MIB.addReg(Src.getReg(), getKillRegState(Src.isKill()), Src.getSubReg());
527 .addReg(Src.getReg(), getKillRegState(Src.isKill()), Src.getSubReg())
|
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 200 MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) |
|
