| /external/llvm/lib/Target/Hexagon/ |
| HexagonVarargsCallingConvention.h | 57 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
58 LocVT.getSimpleVT(), LocInfo));
69 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
70 LocVT.getSimpleVT(), LocInfo));
92 State.addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset3,
93 LocVT.getSimpleVT(), LocInfo));
113 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
114 LocVT.getSimpleVT(), LocInfo));
125 State.addLoc(CCValAssign::getReg(ValNo, ValVT.getSimpleVT(), Reg,
126 LocVT.getSimpleVT(), LocInfo))
[all...] |
| HexagonCallingConvLower.cpp | 52 addLoc(CCValAssign::getMem(ValNo, ValVT.getSimpleVT(), Offset,
53 LocVT.getSimpleVT(), LocInfo));
|
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 217 MVT SimpleVT = LoadedVT.getSimpleVT();
252 MVT::SimpleValueType TargetVT = LD->getValueType(0).getSimpleVT().SimpleTy;
453 MVT SimpleVT = LoadedVT.getSimpleVT();
495 switch (EltVT.getSimpleVT().SimpleTy) {
519 switch (EltVT.getSimpleVT().SimpleTy) {
549 switch (EltVT.getSimpleVT().SimpleTy) {
573 switch (EltVT.getSimpleVT().SimpleTy) {
604 switch (EltVT.getSimpleVT().SimpleTy) {
628 switch (EltVT.getSimpleVT().SimpleTy) {
651 switch (EltVT.getSimpleVT().SimpleTy)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 148 MVT VT = RealVT.getSimpleVT();
152 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT();
220 Reg = FastEmit_r(IntVT.getSimpleVT(), VT, ISD::SINT_TO_FP,
298 IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::SIGN_EXTEND,
303 IdxN = FastEmit_r(IdxVT.getSimpleVT(), PtrVT, ISD::TRUNCATE,
387 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1,
389 VT.getSimpleVT());
423 unsigned ResultReg = FastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0,
424 Op0IsKill, Imm, VT.getSimpleVT());
434 unsigned ResultReg = FastEmit_rf(VT.getSimpleVT(), VT.getSimpleVT()
[all...] |
| LegalizeVectorOps.cpp | 168 switch (TLI.getTruncStoreAction(ValVT, StVT.getSimpleVT())) {
358 MVT NVT = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts);
|
| LegalizeDAG.cpp | 273 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1);
[all...] |
| SelectionDAG.cpp | 673 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
674 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 273 (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT));
274 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != 0;
412 unsigned I = (unsigned) VT.getSimpleVT().SimpleTy;
459 getLoadExtAction(ExtType, VT.getSimpleVT()) == Legal;
476 getTruncStoreAction(ValVT.getSimpleVT(), MemVT.getSimpleVT()) == Legal;
493 (getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Legal ||
494 getIndexedLoadAction(IdxMode, VT.getSimpleVT()) == Custom);
511 (getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Legal ||
512 getIndexedStoreAction(IdxMode, VT.getSimpleVT()) == Custom)
[all...] |
| TargetCallingConv.h | 130 VT = vt.getSimpleVT();
158 VT = vt.getSimpleVT();
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 288 ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT());
319 ISD, DstTy.getSimpleVT(),
320 SrcTy.getSimpleVT());
352 ISD, DstTy.getSimpleVT(),
353 SrcTy.getSimpleVT());
374 ISD, DstTy.getSimpleVT(),
375 SrcTy.getSimpleVT());
417 ISD, SelCondTy.getSimpleVT(),
418 SelValTy.getSimpleVT());
[all...] |
| ARMFastISel.cpp | 733 MVT VT = CEVT.getSimpleVT();
778 VT = evt.getSimpleVT();
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 310 switch (VT.getSimpleVT().SimpleTy) {
335 MVT VT = LD->getMemoryVT().getSimpleVT();
364 MVT VT = LD->getMemoryVT().getSimpleVT();
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 252 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32
253 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) {
263 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32
264 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) {
|
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 228 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32
229 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) {
238 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32
239 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) {
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 252 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32
253 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) {
263 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32
264 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) {
|
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 157 VT = evt.getSimpleVT();
184 switch (VT.getSimpleVT().SimpleTy) {
242 switch (VT.getSimpleVT().SimpleTy) {
303 switch (VT.getSimpleVT().SimpleTy) {
338 unsigned RR = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc,
808 SrcReg = FastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op,
876 switch (VT.getSimpleVT().SimpleTy) {
893 switch (VT.getSimpleVT().SimpleTy)
[all...] |
| X86TargetTransformInfo.cpp | 400 // The function getSimpleVT only handles simple value types.
451 ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT());
|
| X86ISelLowering.cpp | [all...] |
| X86ISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 798 MVT::SimpleValueType VT = VecVT.getSimpleVT().SimpleTy;
826 if (VecVT.getSimpleVT().isFloatingPoint()) {
[all...] |
| PPCFastISel.cpp | 282 MVT VT = CEVT.getSimpleVT();
|
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 604 MVT EltTy = getSimpleVT().getVectorElementType();
722 /// getSimpleVT - Return the SimpleValueType held in the specified
724 MVT getSimpleVT() const {
|
| /external/llvm/utils/TableGen/ |
| IntrinsicEmitter.cpp | 361 getSimpleVT().SimpleTy, Sig);
|
