| /art/compiler/utils/mips/ |
| assembler_mips.h | 226 void Addi(Register rt, Register rs, uint16_t imm16);
227 void Addiu(Register rt, Register rs, uint16_t imm16);
236 void Andi(Register rt, Register rs, uint16_t imm16);
238 void Ori(Register rt, Register rs, uint16_t imm16);
240 void Xori(Register rt, Register rs, uint16_t imm16);
250 void Lb(Register rt, Register rs, uint16_t imm16);
251 void Lh(Register rt, Register rs, uint16_t imm16);
252 void Lw(Register rt, Register rs, uint16_t imm16);
253 void Lbu(Register rt, Register rs, uint16_t imm16);
254 void Lhu(Register rt, Register rs, uint16_t imm16);
[all...] |
| assembler_mips.cc | 182 void MipsAssembler::Addi(Register rt, Register rs, uint16_t imm16) {
183 EmitI(0x8, rs, rt, imm16);
186 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) {
187 EmitI(0x9, rs, rt, imm16);
218 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) {
219 EmitI(0xc, rs, rt, imm16);
226 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) {
227 EmitI(0xd, rs, rt, imm16);
234 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) {
235 EmitI(0xe, rs, rt, imm16);
[all...] |
| /external/valgrind/main/none/tests/x86/ |
| insn_basic.def | 35 adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912]
36 adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913]
37 adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912]
38 adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913]
39 adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912]
40 adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913]
68 addw imm16[1234] ax.uw[5678] => 1.uw[6912]
69 addw imm16[1234] bx.uw[5678] => 1.uw[6912]
70 addw imm16[1234] m16.uw[5678] => 1.uw[6912]
88 andw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x0230
[all...] |
| gen_insn_test.pl | 405 elsif ($arg =~ /^(imm8|imm16|imm32)\[([^\]]+)\]$/)
|
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| enc_tabl.cpp | 350 {OpcodeInfo::decoder, {Size16, opcode_starts_from + 5, iw}, {AX, imm16}, DU_U },\
355 {OpcodeInfo::all, {Size16, 0x81, opc_ext, iw}, {r_m16, imm16}, def_use },\
[all...] |
| enc_prvt.h | 199 #define imm16 {OpndKind_Imm, OpndSize_16, OpndExt_Any, RegName_Null} macro
|
| /external/valgrind/main/VEX/priv/ |
| host_mips_defs.c | 948 MIPSRH *MIPSRH_Imm(Bool syned, UShort imm16)
953 op->Mrh.Imm.imm16 = imm16;
957 vassert(imm16 != 0x8000);
976 vex_printf("%d", (Int) (Short) op->Mrh.Imm.imm16);
978 vex_printf("%u", (UInt) (UShort) op->Mrh.Imm.imm16);
[all...] |
| host_ppc_defs.c | 396 PPCRH* PPCRH_Imm ( Bool syned, UShort imm16 ) {
400 op->Prh.Imm.imm16 = imm16;
404 vassert(imm16 != 0x8000);
419 vex_printf("%d", (Int)(Short)op->Prh.Imm.imm16);
421 vex_printf("%u", (UInt)(UShort)op->Prh.Imm.imm16);
[all...] |
| host_mips_defs.h | 222 UShort imm16; member in struct:__anon29074::__anon29075::__anon29076
|
| host_mips_isel.c | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.cc | 399 void ArmAssembler::movw(Register rd, uint16_t imm16, Condition cond) {
402 B25 | B24 | ((imm16 >> 12) << 16) |
403 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
408 void ArmAssembler::movt(Register rd, uint16_t imm16, Condition cond) {
411 B25 | B24 | B22 | ((imm16 >> 12) << 16) |
412 static_cast<int32_t>(rd) << kRdShift | (imm16 & 0xfff);
1038 void ArmAssembler::bkpt(uint16_t imm16) {
[all...] |
| assembler_arm.h | 260 void movw(Register rd, uint16_t imm16, Condition cond = AL);
261 void movt(Register rd, uint16_t imm16, Condition cond = AL);
301 void bkpt(uint16_t imm16);
|
| /external/chromium_org/v8/src/ia32/ |
| assembler-ia32.cc | 838 void Assembler::cmpw(const Operand& op, Immediate imm16) {
839 ASSERT(imm16.is_int16());
844 emit_w(imm16);
1321 void Assembler::ret(int imm16) {
1323 ASSERT(is_uint16(imm16));
1324 if (imm16 == 0) {
1328 EMIT(imm16 & 0xFF);
1329 EMIT((imm16 >> 8) & 0xFF);
[all...] |
| assembler-ia32.h | 777 void cmpw(const Operand& op, Immediate imm16);
874 void ret(int imm16);
[all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.cc | 847 void Assembler::cmpw(const Operand& op, Immediate imm16) {
848 ASSERT(imm16.is_int16());
853 emit_w(imm16);
1305 void Assembler::ret(int imm16) {
1307 ASSERT(is_uint16(imm16));
1308 if (imm16 == 0) {
1312 EMIT(imm16 & 0xFF);
1313 EMIT((imm16 >> 8) & 0xFF);
[all...] |
| assembler-ia32.h | 761 void cmpw(const Operand& op, Immediate imm16);
856 void ret(int imm16);
[all...] |
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.cc | 720 int32_t imm16 = imm18 >> 2;
721 ASSERT(is_int16(imm16));
723 instr_at_put(pos, instr | (imm16 & kImm16Mask));
1046 int32_t imm16 = imm18 >> 2; local
1047 ASSERT(is_int16(imm16));
1048 instr_at_put(at_offset, (imm16 & kImm16Mask));
[all...] |
| simulator-mips.cc | 2442 int16_t imm16 = instr->Imm16Value(); local
[all...] |
| /external/v8/src/mips/ |
| assembler-mips.cc | 726 int32_t imm16 = imm18 >> 2;
727 ASSERT(is_int16(imm16));
729 instr_at_put(pos, instr | (imm16 & kImm16Mask));
1041 int32_t imm16 = imm18 >> 2; local
1042 ASSERT(is_int16(imm16));
1043 instr_at_put(at_offset, (imm16 & kImm16Mask));
[all...] |
| simulator-mips.cc | 2302 int16_t imm16 = instr->Imm16Value(); local
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.c | 1450 uint16_t imm16; local
[all...] |
| /art/runtime/ |
| disassembler_arm.cc | 693 // MOVW/T Rd, #imm16 - 111 10 i0 0010 0 iiii 0 iii dddd iiiiiiii
699 uint32_t imm16 = (Rn << 12) | (i << 11) | (imm3 << 8) | imm8; local
701 args << Rd << ", #" << imm16; local
[all...] |
| /external/valgrind/main/none/tests/amd64/ |
| gen_insn_test.pl | 428 elsif ($arg =~ /^(imm8|imm16|imm32|imm64)\[([^\]]+)\]$/)
|
| /external/chromium_org/v8/src/x64/ |
| assembler-x64.cc | [all...] |
| /external/v8/src/x64/ |
| assembler-x64.cc | [all...] |
