| /external/valgrind/main/none/tests/s390x/ |
| fpconv.c | 6 #define I2F(insn, initial, target,round) \
10 asm volatile(insn " 0,2\n\t" :"=f" (_t):"d"(source)); \
14 #define F2L(insn, initial, type, round, cc) \
18 asm volatile(insn " 2," #round ",0\n\t" \
26 #define DO_INSN_I2F32(insn, round) \
29 printf(#insn " %f\n", I2F(insn, 0, f32, round)); \
30 printf(#insn " %f\n", I2F(insn, 1, f32, round)); \
31 printf(#insn " %f\n", I2F(insn, 0xffffffffUL, f32, round));
[all...] |
| condloadstore.c | 5 #define LOAD_REG_MEM(insn, s, ccset, initial, mask) \
19 insn(1,mask,5,000,00) \
23 printf(#insn " %16.16lX into %16.16lX if mask" \
29 #define LOAD_REG_REG(insn, s, ccset, initial, mask) \
42 insn(mask,1,2) \
46 printf(#insn " %16.16lX into %16.16lX if mask" \
51 #define STORE_REG_REG(insn, s, ccset, initial, mask) \
65 insn(1,mask,5,000,00) \
69 printf(#insn " %16.16lX into %16.16lX if mask" \
75 #define INSNVALCCINIT(insn, value, ccset, INIT, FUNC)
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.c | 166 * @param insn - The instruction with the reader function to use. The cursor
172 static int consumeByte(struct InternalInstruction* insn, uint8_t* byte) {
173 int ret = insn->reader(insn->readerArg, byte, insn->readerCursor);
176 ++(insn->readerCursor);
184 * @param insn - See consumeByte().
188 static int lookAtByte(struct InternalInstruction* insn, uint8_t* byte) {
189 return insn->reader(insn->readerArg, byte, insn->readerCursor)
[all...] |
| /external/libpcap/ |
| bpf_dump.c | 36 struct bpf_insn *insn; local
40 insn = p->bf_insns;
43 for (i = 0; i < n; ++insn, ++i) {
44 printf("%u %u %u %u\n", insn->code,
45 insn->jt, insn->jf, insn->k);
50 for (i = 0; i < n; ++insn, ++i)
52 insn->code, insn->jt, insn->jf, insn->k)
[all...] |
| /external/tcpdump/ |
| bpf_dump.c | 40 struct bpf_insn *insn; local
44 insn = p->bf_insns;
47 for (i = 0; i < n; ++insn, ++i) {
48 printf("%u %u %u %u\n", insn->code,
49 insn->jt, insn->jf, insn->k);
54 for (i = 0; i < n; ++insn, ++i)
56 insn->code, insn->jt, insn->jf, insn->k)
[all...] |
| /sdk/emulator/qtools/ |
| armdis.h | 11 static char *disasm(uint32_t addr, uint32_t insn, char *buffer);
12 static Opcode decode(uint32_t insn);
15 static Opcode decode00(uint32_t insn);
16 static Opcode decode01(uint32_t insn);
17 static Opcode decode10(uint32_t insn);
18 static Opcode decode11(uint32_t insn);
19 static Opcode decode_mul(uint32_t insn);
20 static Opcode decode_ldrh(uint32_t insn);
21 static Opcode decode_alu(uint32_t insn);
23 static char *disasm_alu(Opcode opcode, uint32_t insn, char *ptr)
[all...] |
| armdis.cpp | 39 char *Arm::disasm(uint32_t addr, uint32_t insn, char *result)
45 Opcode opcode = decode(insn);
69 return disasm_alu(opcode, insn, ptr);
72 return disasm_branch(addr, opcode, insn, ptr);
74 return disasm_bkpt(insn, ptr);
79 return disasm_bx(insn, ptr);
84 return disasm_clz(insn, ptr);
90 return disasm_memblock(opcode, insn, ptr);
99 return disasm_mem(insn, ptr);
104 return disasm_memhalf(insn, ptr)
[all...] |
| /dalvik/dx/src/com/android/dx/dex/code/form/ |
| Form30t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
71 public boolean branchFits(TargetInsn insn) {
77 public void writeTo(AnnotatedOutput out, DalvInsn insn) {
78 int offset = ((TargetInsn) insn).getTargetOffset()
[all...] |
| Form21t.java | 44 public String insnArgString(DalvInsn insn) {
45 RegisterSpecList regs = insn.getRegisters();
46 return regs.get(0).regString() + ", " + branchString(insn);
51 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
52 return branchComment(insn);
63 public boolean isCompatible(DalvInsn insn) {
64 RegisterSpecList regs = insn.getRegisters();
66 if (!((insn instanceof TargetInsn) &&
72 TargetInsn ti = (TargetInsn) insn;
78 public BitSet compatibleRegs(DalvInsn insn) {
[all...] |
| Form22t.java | 44 public String insnArgString(DalvInsn insn) {
45 RegisterSpecList regs = insn.getRegisters();
47 ", " + branchString(insn);
52 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
53 return branchComment(insn);
64 public boolean isCompatible(DalvInsn insn) {
65 RegisterSpecList regs = insn.getRegisters();
67 if (!((insn instanceof TargetInsn) &&
74 TargetInsn ti = (TargetInsn) insn;
80 public BitSet compatibleRegs(DalvInsn insn) {
[all...] |
| Form10t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
66 TargetInsn ti = (TargetInsn) insn;
72 public boolean branchFits(TargetInsn insn) {
73 int offset = insn.getTargetOffset()
[all...] |
| Form20t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
66 TargetInsn ti = (TargetInsn) insn;
72 public boolean branchFits(TargetInsn insn) {
73 int offset = insn.getTargetOffset()
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/form/ |
| Form30t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
71 public boolean branchFits(TargetInsn insn) {
77 public void writeTo(AnnotatedOutput out, DalvInsn insn) {
78 int offset = ((TargetInsn) insn).getTargetOffset()
[all...] |
| Form21t.java | 45 public String insnArgString(DalvInsn insn) {
46 RegisterSpecList regs = insn.getRegisters();
47 return regs.get(0).regString() + ", " + branchString(insn);
52 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
53 return branchComment(insn);
64 public boolean isCompatible(DalvInsn insn) {
65 RegisterSpecList regs = insn.getRegisters();
67 if (!((insn instanceof TargetInsn) &&
73 TargetInsn ti = (TargetInsn) insn;
79 public BitSet compatibleRegs(DalvInsn insn) {
[all...] |
| Form22t.java | 45 public String insnArgString(DalvInsn insn) {
46 RegisterSpecList regs = insn.getRegisters();
48 ", " + branchString(insn);
53 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
54 return branchComment(insn);
65 public boolean isCompatible(DalvInsn insn) {
66 RegisterSpecList regs = insn.getRegisters();
68 if (!((insn instanceof TargetInsn) &&
75 TargetInsn ti = (TargetInsn) insn;
81 public BitSet compatibleRegs(DalvInsn insn) {
[all...] |
| Form10t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
66 TargetInsn ti = (TargetInsn) insn;
72 public boolean branchFits(TargetInsn insn) {
73 int offset = insn.getTargetOffset()
[all...] |
| Form20t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
66 TargetInsn ti = (TargetInsn) insn;
72 public boolean branchFits(TargetInsn insn) {
73 int offset = insn.getTargetOffset()
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| disassem.c | 62 * insn[cc][mod] [operands]
292 static void disasm_register_shift(const disasm_interface_t *di, u_int insn);
293 static void disasm_print_reglist(const disasm_interface_t *di, u_int insn);
294 static void disasm_insn_ldrstr(const disasm_interface_t *di, u_int insn,
296 static void disasm_insn_ldrhstrh(const disasm_interface_t *di, u_int insn,
298 static void disasm_insn_ldcstc(const disasm_interface_t *di, u_int insn,
308 u_int insn; local
316 insn = di->di_readword(loc);
318 /* di->di_printf("loc=%08x insn=%08x : ", loc, insn);*/
[all...] |
| /dalvik/dexgen/src/com/android/dexgen/dex/code/form/ |
| Form21t.java | 43 public String insnArgString(DalvInsn insn) {
44 RegisterSpecList regs = insn.getRegisters();
45 return regs.get(0).regString() + ", " + branchString(insn);
50 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
51 return branchComment(insn);
62 public boolean isCompatible(DalvInsn insn) {
63 RegisterSpecList regs = insn.getRegisters();
65 if (!((insn instanceof TargetInsn) &&
71 TargetInsn ti = (TargetInsn) insn;
77 public boolean branchFits(TargetInsn insn) {
[all...] |
| Form10t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
66 TargetInsn ti = (TargetInsn) insn;
72 public boolean branchFits(TargetInsn insn) {
73 int offset = insn.getTargetOffset()
[all...] |
| Form20t.java | 42 public String insnArgString(DalvInsn insn) {
43 return branchString(insn);
48 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
49 return branchComment(insn);
60 public boolean isCompatible(DalvInsn insn) {
61 if (!((insn instanceof TargetInsn) &&
62 (insn.getRegisters().size() == 0))) {
66 TargetInsn ti = (TargetInsn) insn;
72 public boolean branchFits(TargetInsn insn) {
73 int offset = insn.getTargetOffset()
[all...] |
| Form31t.java | 43 public String insnArgString(DalvInsn insn) {
44 RegisterSpecList regs = insn.getRegisters();
45 return regs.get(0).regString() + ", " + branchString(insn);
50 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
51 return branchComment(insn);
62 public boolean isCompatible(DalvInsn insn) {
63 RegisterSpecList regs = insn.getRegisters();
65 if (!((insn instanceof TargetInsn) &&
76 public boolean branchFits(TargetInsn insn) {
88 public void writeTo(AnnotatedOutput out, DalvInsn insn) {
[all...] |
| Form22t.java | 43 public String insnArgString(DalvInsn insn) {
44 RegisterSpecList regs = insn.getRegisters();
46 ", " + branchString(insn);
51 public String insnCommentString(DalvInsn insn, boolean noteIndices) {
52 return branchComment(insn);
63 public boolean isCompatible(DalvInsn insn) {
64 RegisterSpecList regs = insn.getRegisters();
66 if (!((insn instanceof TargetInsn) &&
73 TargetInsn ti = (TargetInsn) insn;
79 public boolean branchFits(TargetInsn insn) {
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_eu_emit.c | 44 struct brw_instruction *insn,
48 insn->header.execution_size = BRW_EXECUTE_16;
50 insn->header.execution_size = reg.width; /* note - definitions are compatible */
104 brw_set_dest(struct brw_compile *p, struct brw_instruction *insn,
113 insn->bits1.da1.dest_reg_file = dest.file;
114 insn->bits1.da1.dest_reg_type = dest.type;
115 insn->bits1.da1.dest_address_mode = dest.address_mode;
118 insn->bits1.da1.dest_reg_nr = dest.nr;
120 if (insn->header.access_mode == BRW_ALIGN_1) {
121 insn->bits1.da1.dest_subreg_nr = dest.subnr
702 struct brw_instruction *insn; local
734 struct brw_instruction *insn = next_insn(p, opcode); local
746 struct brw_instruction *insn = next_insn(p, opcode); local
771 struct brw_instruction *insn = next_insn(p, opcode); local
993 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP); local
1012 struct brw_instruction *insn = brw_alu2(p, BRW_OPCODE_JMPI, dest, src0, src1); local
1082 struct brw_instruction *insn; local
1126 struct brw_instruction *insn; local
1285 struct brw_instruction *insn; local
1318 struct brw_instruction *insn = NULL; local
1396 struct brw_instruction *insn; local
1418 struct brw_instruction *insn; local
1434 struct brw_instruction *insn; local
1471 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_DO); local
1524 struct brw_instruction *insn, *do_insn; local
1615 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_CMP); local
1640 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_WAIT); local
1669 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local
1701 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
1729 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local
1785 struct brw_instruction *insn; local
1895 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2002 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2059 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2104 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2136 struct brw_instruction *insn; local
2206 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2247 struct brw_instruction *insn; local
2384 struct brw_instruction *insn; local
2439 struct brw_instruction *insn; local
2483 struct brw_instruction *insn = &p->store[ip]; local
2508 struct brw_instruction *insn = &p->store[ip]; local
2535 struct brw_instruction *insn = &p->store[ip]; local
2564 struct brw_instruction *insn; local
2602 struct brw_instruction *insn; local
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_eu_emit.c | 44 struct brw_instruction *insn,
48 insn->header.execution_size = BRW_EXECUTE_16;
50 insn->header.execution_size = reg.width; /* note - definitions are compatible */
104 brw_set_dest(struct brw_compile *p, struct brw_instruction *insn,
113 insn->bits1.da1.dest_reg_file = dest.file;
114 insn->bits1.da1.dest_reg_type = dest.type;
115 insn->bits1.da1.dest_address_mode = dest.address_mode;
118 insn->bits1.da1.dest_reg_nr = dest.nr;
120 if (insn->header.access_mode == BRW_ALIGN_1) {
121 insn->bits1.da1.dest_subreg_nr = dest.subnr
702 struct brw_instruction *insn; local
734 struct brw_instruction *insn = next_insn(p, opcode); local
746 struct brw_instruction *insn = next_insn(p, opcode); local
771 struct brw_instruction *insn = next_insn(p, opcode); local
993 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_NOP); local
1012 struct brw_instruction *insn = brw_alu2(p, BRW_OPCODE_JMPI, dest, src0, src1); local
1082 struct brw_instruction *insn; local
1126 struct brw_instruction *insn; local
1285 struct brw_instruction *insn; local
1318 struct brw_instruction *insn = NULL; local
1396 struct brw_instruction *insn; local
1418 struct brw_instruction *insn; local
1434 struct brw_instruction *insn; local
1471 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_DO); local
1524 struct brw_instruction *insn, *do_insn; local
1615 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_CMP); local
1640 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_WAIT); local
1669 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local
1701 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
1729 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_MATH); local
1785 struct brw_instruction *insn; local
1895 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2002 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2059 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2104 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2136 struct brw_instruction *insn; local
2206 struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND); local
2247 struct brw_instruction *insn; local
2384 struct brw_instruction *insn; local
2439 struct brw_instruction *insn; local
2483 struct brw_instruction *insn = &p->store[ip]; local
2508 struct brw_instruction *insn = &p->store[ip]; local
2535 struct brw_instruction *insn = &p->store[ip]; local
2564 struct brw_instruction *insn; local
2602 struct brw_instruction *insn; local
[all...] |
