/external/llvm/test/MC/AArch64/ |
neon-mov.s | 11 movi v15.2s, #1, lsl #8 12 movi v16.2s, #1, lsl #16 13 movi v31.2s, #1, lsl #24 15 movi v0.4s, #1, lsl #8 16 movi v0.4s, #1, lsl #16 17 movi v0.4s, #1, lsl #24 19 movi v0.4h, #1, lsl #8 21 movi v0.8h, #1, lsl #8 25 // CHECK: movi v15.2s, #0x1, lsl #8 // encoding: [0x2f,0x24,0x00,0x0f] 26 // CHECK: movi v16.2s, #0x1, lsl #16 // encoding: [0x30,0x44,0x00,0x0f [all...] |
/external/compiler-rt/lib/arm/ |
switch16.S | 36 add r0, lr, r0, lsl #1 // compute address of element in table 38 add ip, lr, ip, lsl #1 // compute address of last element in table 40 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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switch32.S | 36 add r0, lr, r0, lsl #2 // compute address of element in table 38 add ip, lr, ip, lsl #2 // compute address of last element in table
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comparesf2.S | 50 mov r2, r0, lsl #1 51 mov r3, r1, lsl #1 108 mov r2, r0, lsl #1 109 mov r3, r1, lsl #1 124 mov r2, r0, lsl #1 125 mov r3, r1, lsl #1
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switch8.S | 38 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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switchu8.S | 38 add ip, lr, r0, lsl #1 // compute label = lr + element*2
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/external/webrtc/src/common_audio/signal_processing/ |
spl_sqrt_floor.s | 23 adc r2, r1, r2, lsl #1 27 adc r2, r1, r2, lsl #1 31 adc r2, r1, r2, lsl #1 35 adc r2, r1, r2, lsl #1 39 adc r2, r1, r2, lsl #1 43 adc r2, r1, r2, lsl #1 47 adc r2, r1, r2, lsl #1 51 adc r2, r1, r2, lsl #1 55 adc r2, r1, r2, lsl #1 59 adc r2, r1, r2, lsl # [all...] |
/external/chromium_org/third_party/skia/src/opts/ |
memset.arm.S | 42 mov r2, r2, lsl #1 45 orr r1, r1, r1, lsl #16 66 mov r2, r2, lsl #2 84 movs r3, r3, lsl #28 88 movs r3, r3, lsl #2 102 movs r2, r2, lsl #28 105 movs r2, r2, lsl #2
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/external/jpeg/ |
armv6_idct.S | 125 rsb r4, r0, r4, lsl #1 126 rsb r2, r6, r2, lsl #1 147 sub r7, r1, r7, lsl #1 149 rsb r5, r3, r5, lsl #1 150 add r3, r1, r3, lsl #1 165 sub r6, r0, r6, lsl #1 177 sub r2, r4, r2, lsl #1 185 rsb r7, r3, r5, lsl #3 186 sub r3, r0, r3, lsl #1 189 rsb r5, r1, r8, lsl # [all...] |
/external/qemu/distrib/jpeg-6b/ |
armv6_idct.S | 125 rsb r4, r0, r4, lsl #1 126 rsb r2, r6, r2, lsl #1 147 sub r7, r1, r7, lsl #1 149 rsb r5, r3, r5, lsl #1 150 add r3, r1, r3, lsl #1 165 sub r6, r0, r6, lsl #1 177 sub r2, r4, r2, lsl #1 185 rsb r7, r3, r5, lsl #3 186 sub r3, r0, r3, lsl #1 189 rsb r5, r1, r8, lsl # [all...] |
/external/skia/src/opts/ |
memset.arm.S | 42 mov r2, r2, lsl #1 45 orr r1, r1, r1, lsl #16 66 mov r2, r2, lsl #2 84 movs r3, r3, lsl #28 88 movs r3, r3, lsl #2 102 movs r2, r2, lsl #28 105 movs r2, r2, lsl #2
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/system/core/libpixelflinger/ |
col32cb16blend.S | 49 mov r10, r10, lsl #5 // prescale red 50 mov r12, r12, lsl #6 // prescale green 51 mov r4, r4, lsl #5 // prescale blue 67 mov r6, r6, lsl #11 // shift red into 565 68 orr r6, r7, lsl #5 // shift green into 565
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/external/valgrind/main/none/tests/arm/ |
v6intThumb.stdout.exp | [all...] |
/bionic/libc/arch-arm/generic/bionic/ |
memcpy.S | 79 movs r12, r3, lsl #31 108 movs r12, r3, lsl #28 179 movs r12, r2, lsl #28 184 movs r12, r2, lsl #30 220 mov r12, r5, lsl #3 /* r12 = right */ 230 movs r5, r5, lsl #31 246 orr r4, r3, r5, lsl lr 274 orr r3, r3, r4, lsl #16 276 orr r4, r4, r5, lsl #16 278 orr r5, r5, r6, lsl #1 [all...] |
/frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
band_nrg_v5.s | 31 mov r2, r2, lsl #16 40 mov r2, r4, lsl #1 49 ldr r11, [r0, +r10, lsl #2] 51 ldr r6, [r0, +r10, lsl #2] 55 ldr r11, [r0, +r10, lsl #2] 59 ldr r6, [r0, +r10, lsl #2] 70 str r14, [r3, +r4, lsl #2] 90 mov r3, r3, lsl #16 98 mov r5, r4, lsl #1 113 ldr r8, [r0, +r10, lsl #2 [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_CONST_WIDE.S | 6 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb (low word) 9 orr r1, r2, r3, lsl #16 @ r1<- HHHHhhhh (high word) 11 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
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OP_CONST_WIDE_32.S | 7 orr r0, r0, r2, lsl #16 @ r0<- BBBBbbbb 8 add r3, rFP, r3, lsl #2 @ r3<- &fp[AA]
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OP_CONST_WIDE_HIGH16.S | 6 mov r1, r1, lsl #16 @ r1<- BBBB0000 8 add r3, rFP, r3, lsl #2 @ r3<- &fp[AA]
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OP_MOVE_WIDE_16.S | 6 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 7 add r2, rFP, r2, lsl #2 @ r2<- &fp[AAAA]
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OP_MOVE_WIDE_FROM16.S | 6 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 7 add r2, rFP, r2, lsl #2 @ r2<- &fp[AA]
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OP_NEW_INSTANCE.S | 16 ldr r0, [r3, r1, lsl #2] @ r0<- resolved class 18 add r10, r3, r1, lsl #2 @ r10<- &resolved_class
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/external/libvpx/libvpx/vp8/common/arm/armv6/ |
intra4x4_predict_v6.asm | 37 addlt pc, pc, r3, lsl #2 ; position independent switch 69 add r12, r12, r12, lsl #8 71 add r12, r12, r12, lsl #16 91 add r9, r9, r9, lsl #16 ; [tl|tl] 97 add r4, r4, r4, lsl #16 ; l[0|0] 98 add r5, r5, r5, lsl #16 ; l[1|1] 99 add r6, r6, r6, lsl #16 ; l[2|2] 100 add r7, r7, r7, lsl #16 ; l[3|3] 110 add r12, r1, r2, lsl #8 ; [3|2|1|0] 119 add r12, r4, r5, lsl #8 ; [3|2|1|0 [all...] |
/dalvik/vm/mterp/armv6t2/ |
OP_MOVE_WIDE.S | 6 add r3, rFP, r3, lsl #2 @ r3<- &fp[B] 7 add r2, rFP, r2, lsl #2 @ r2<- &fp[A]
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/external/libvpx/libvpx/build/make/ |
thumb.pm | 19 # Write additions with shifts, such as "add r10, r11, lsl #8", 20 # in three operand form, "add r10, r10, r11, lsl #8". 21 s/(add\s+)(r\d+),\s*(r\d+),\s*(lsl #\d+)/$1$2, $2, $3, $4/g; 28 # This converts instructions such as "add r12, r12, r5, lsl r4" 29 # into the sequence "lsl r5, r4", "add r12, r12, r5", "lsr r5, r4". 30 s/^(\s*)(add)(\s+)(r\d+),\s*(r\d+),\s*(r\d+),\s*lsl (r\d+)/$1lsl$3$6, $7\n$1$2$3$4, $5, $6\n$1lsr$3$6, $7/g; 44 # This converts "ldrne r4, [src, -pstep, lsl #1]" into 45 # "subne src, src, pstep, lsl #1", "ldrne r4, [src]", 46 # "addne src, src, pstep, lsl #1". In a couple of cases wher [all...] |
/frameworks/native/opengl/libagl/ |
fixed_asm.S | 36 movs r1, r0, lsl #1 /* remove bit sign */ 39 mov r2, r0, lsl #8 /* mantissa<<8 */ 51 mov r1, r0, lsl #1 /* remove bit sign */ 55 mov r2, r0, lsl #8 /* mantissa<<8 */
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