/dalvik/vm/compiler/template/mips/ |
TEMPLATE_SHL_LONG.S | 9 not rRESULT1, a2 # rhi<- 31-shift (shift is 5b) 12 sll rRESULT1, rARG1, a2 # rhi<- ahi << (shift&31) 13 or rRESULT1, rARG0 # rhi<- rhi | alo 15 movn rRESULT1, rRESULT0, a2 # rhi<- rlo (if shift&0x20)
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TEMPLATE_USHR_LONG.S | 8 srl rRESULT1, rARG1, a2 # rhi<- ahi >> (shift&31) 15 movn rRESULT0, rRESULT1, a2 # rlo<- rhi (if shift&0x20) 16 movn rRESULT1, zero, a2 # rhi<- 0 (if shift&0x20)
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TEMPLATE_SHR_LONG.S | 8 sra rRESULT1, rARG1, a2 # rhi<- ahi >> (shift&31) 16 movn rRESULT0, rRESULT1, a2 # rlo<- rhi (if shift&0x20) 17 movn rRESULT1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
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header.S | 265 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, off(rbase); \ 266 sw rhi, (off+4)(rbase) 267 #define LOAD64_off(rlo,rhi,rbase,off) lw rlo, off(rbase); \ 268 lw rhi, (off+4)(rbase) 270 #define STORE64_off_F(rlo,rhi,rbase,off) s.s rlo, off(rbase); \ 271 s.s rhi, (off+4)(rbase) 272 #define LOAD64_off_F(rlo,rhi,rbase,off) l.s rlo, off(rbase); \ 273 l.s rhi, (off+4)(rbase) 276 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, (off+4)(rbase); \ 277 sw rhi, (off)(rbase [all...] |
/dalvik/vm/mterp/mips/ |
OP_SHL_LONG_2ADDR.S | 16 not v1, a2 # rhi<- 31-shift (shift is 5b) 19 sll v1, a1, a2 # rhi<- ahi << (shift&31) 20 or v1, a0 # rhi<- rhi | alo 22 movn v1, v0, a2 # rhi<- rlo (if shift&0x20)
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OP_SHL_LONG.S | 21 not v1, a2 # rhi<- 31-shift (shift is 5b) 24 sll v1, a1, a2 # rhi<- ahi << (shift&31) 25 or v1, a0 # rhi<- rhi | alo 27 movn v1, v0, a2 # rhi<- rlo (if shift&0x20)
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header.S | 194 #define STORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 195 sw rhi, (off+4)(rbase) 196 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 197 lw rhi, (off+4)(rbase) 199 #define vSTORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 200 sw rhi, (off+4)(rbase) 201 #define vLOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 202 lw rhi, (off+4)(rbase) 204 #define STORE64_off_F(rlo, rhi, rbase, off) s.s rlo, off(rbase); \ 205 s.s rhi, (off+4)(rbase [all...] |
OP_USHR_LONG_2ADDR.S | 14 srl v1, a1, a2 # rhi<- ahi >> (shift&31) 21 movn v0, v1, a2 # rlo<- rhi (if shift&0x20) 22 movn v1, zero, a2 # rhi<- 0 (if shift&0x20)
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OP_SHR_LONG.S | 19 sra v1, a1, a2 # rhi<- ahi >> (shift&31) 27 movn v0, v1, a2 # rlo<- rhi (if shift&0x20) 28 movn v1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
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OP_SHR_LONG_2ADDR.S | 14 sra v1, a1, a2 # rhi<- ahi >> (shift&31) 22 movn v0, v1, a2 # rlo<- rhi (if shift&0x20) 23 movn v1, a3, a2 # rhi<- sign(ahi) (if shift&0x20)
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OP_USHR_LONG.S | 19 srl v1, a1, a2 # rhi<- ahi >> (shift&31) 26 movn v0, v1, a2 # rlo<- rhi (if shift&0x20) 27 movn v1, zero, a2 # rhi<- 0 (if shift&0x20)
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/external/chromium_org/third_party/skia/src/core/ |
Sk64.cpp | 251 int32_t rhi = 0; local 255 shift_left(rhi, rlo); 263 SkASSERT(rhi >= 0); 265 fHi = rhi;
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/external/skia/src/core/ |
Sk64.cpp | 251 int32_t rhi = 0; local 255 shift_left(rhi, rlo); 263 SkASSERT(rhi >= 0); 265 fHi = rhi;
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/external/pixman/pixman/ |
pixman-matrix.c | 145 int64_t *rhi, 156 *rhi = *rlo >> 63; 160 *rhi = hi >> (64 - scalebits); 275 int64_t hi, rhi, lo, rlo; local 279 rlo = rounded_sdiv_128_by_49 (hi, lo, div, &rhi); 280 result->v[0] = fixed_112_16_to_fixed_48_16 (rhi, rlo, &clampflag); 283 rlo = rounded_sdiv_128_by_49 (hi, lo, div, &rhi); 284 result->v[1] = fixed_112_16_to_fixed_48_16 (rhi, rlo, &clampflag); 289 int64_t hi, rhi, lo, rlo, div; local 294 rlo = rounded_sdiv_128_by_49 (hi, lo, div, &rhi); [all...] |
/dalvik/vm/compiler/template/out/ |
CompilerTemplateAsm-mips.S | 272 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, off(rbase); \ 273 sw rhi, (off+4)(rbase) 274 #define LOAD64_off(rlo,rhi,rbase,off) lw rlo, off(rbase); \ 275 lw rhi, (off+4)(rbase) 277 #define STORE64_off_F(rlo,rhi,rbase,off) s.s rlo, off(rbase); \ 278 s.s rhi, (off+4)(rbase) 279 #define LOAD64_off_F(rlo,rhi,rbase,off) l.s rlo, off(rbase); \ 280 l.s rhi, (off+4)(rbase) 283 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, (off+4)(rbase); \ 284 sw rhi, (off)(rbase [all...] |
/external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/ |
ghash-ia64.pl | 213 my ($rlo,$rhi)=("r".eval(16+2*$i),"r".eval(16+2*$i+1)); 216 st8 [r9]=$rhi,16 // Htable[$i].hi 217 shrp $rlo=$rhi,$rlo,4 }//;; 220 shr.u $rhi=$rhi,4 };; 222 st8 [r15]=$rhi,16 }//;; // Htable[$i].hi>>4
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/external/openssl/crypto/modes/asm/ |
ghash-ia64.pl | 213 my ($rlo,$rhi)=("r".eval(16+2*$i),"r".eval(16+2*$i+1)); 216 st8 [r9]=$rhi,16 // Htable[$i].hi 217 shrp $rlo=$rhi,$rlo,4 }//;; 220 shr.u $rhi=$rhi,4 };; 222 st8 [r15]=$rhi,16 }//;; // Htable[$i].hi>>4
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/dalvik/vm/mterp/out/ |
InterpAsm-mips.S | 201 #define STORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 202 sw rhi, (off+4)(rbase) 203 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 204 lw rhi, (off+4)(rbase) 206 #define vSTORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 207 sw rhi, (off+4)(rbase) 208 #define vLOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 209 lw rhi, (off+4)(rbase) 211 #define STORE64_off_F(rlo, rhi, rbase, off) s.s rlo, off(rbase); \ 212 s.s rhi, (off+4)(rbase [all...] |
/external/compiler-rt/test/Unit/ppc/ |
qdiv_test.c | 22 double rhi; double rlo; member in struct:testVector 113 r.hi = edgeCases[i].rhi; [all...] |
qmul_test.c | 22 double rhi; double rlo; member in struct:testVector 113 r.hi = edgeCases[i].rhi; [all...] |
qadd_test.c | 22 double rhi; double rlo; member in struct:testVector 113 r.hi = edgeCases[i].rhi; [all...] |
qsub_test.c | 22 double rhi; double rlo; member in struct:testVector 113 r.hi = edgeCases[i].rhi; [all...] |