/dalvik/vm/compiler/template/mips/ |
TEMPLATE_USHR_LONG.S | 9 srl rRESULT0, rARG0, a2 # rlo<- alo >> (shift&31) 13 or rRESULT0, rARG1 # rlo<- rlo | ahi 15 movn rRESULT0, rRESULT1, a2 # rlo<- rhi (if shift&0x20)
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TEMPLATE_SHR_LONG.S | 9 srl rRESULT0, rARG0, a2 # rlo<- alo >> (shift&31) 14 or rRESULT0, rARG1 # rlo<- rlo | ahi 16 movn rRESULT0, rRESULT1, a2 # rlo<- rhi (if shift&0x20)
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TEMPLATE_SHL_LONG.S | 8 sll rRESULT0, rARG0, a2 # rlo<- alo << (shift&31) 15 movn rRESULT1, rRESULT0, a2 # rhi<- rlo (if shift&0x20) 16 movn rRESULT0, zero, a2 # rlo<- 0 (if shift&0x20)
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header.S | 265 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, off(rbase); \ 267 #define LOAD64_off(rlo,rhi,rbase,off) lw rlo, off(rbase); \ 270 #define STORE64_off_F(rlo,rhi,rbase,off) s.s rlo, off(rbase); \ 272 #define LOAD64_off_F(rlo,rhi,rbase,off) l.s rlo, off(rbase); \ 276 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, (off+4)(rbase); [all...] |
/dalvik/vm/mterp/mips/ |
OP_USHR_LONG_2ADDR.S | 15 srl v0, a0, a2 # rlo<- alo >> (shift&31) 19 or v0, a1 # rlo<- rlo | ahi 21 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
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header.S | 194 #define STORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 196 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 199 #define vSTORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 201 #define vLOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 204 #define STORE64_off_F(rlo, rhi, rbase, off) s.s rlo, off(rbase); [all...] |
OP_SHL_LONG_2ADDR.S | 15 sll v0, a0, a2 # rlo<- alo << (shift&31) 22 movn v1, v0, a2 # rhi<- rlo (if shift&0x20) 23 movn v0, zero, a2 # rlo<- 0 (if shift&0x20)
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OP_SHR_LONG.S | 20 srl v0, a0, a2 # rlo<- alo >> (shift&31) 25 or v0, a1 # rlo<- rlo | ahi 27 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
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OP_SHR_LONG_2ADDR.S | 15 srl v0, a0, a2 # rlo<- alo >> (shift&31) 20 or v0, a1 # rlo<- rlo | ahi 22 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
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OP_USHR_LONG.S | 20 srl v0, a0, a2 # rlo<- alo >> (shift&31) 24 or v0, a1 # rlo<- rlo | ahi 26 movn v0, v1, a2 # rlo<- rhi (if shift&0x20)
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OP_SHL_LONG.S | 20 sll v0, a0, a2 # rlo<- alo << (shift&31) 27 movn v1, v0, a2 # rhi<- rlo (if shift&0x20) 28 movn v0, zero, a2 # rlo<- 0 (if shift&0x20)
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/external/chromium_org/third_party/skia/src/core/ |
Sk64.cpp | 252 uint32_t rlo = 0; local 255 shift_left(rhi, rlo); 259 rlo |= 1; 266 fLo = rlo;
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/external/pixman/pixman/ |
pixman-matrix.c | 146 int64_t *rlo, 155 *rlo = hi >> (-scalebits); 156 *rhi = *rlo >> 63; 161 *rlo = (uint64_t)hi << scalebits; 163 *rlo += lo >> (16 - scalebits); 165 *rlo += lo << (scalebits - 16); 275 int64_t hi, rhi, lo, rlo; local 279 rlo = rounded_sdiv_128_by_49 (hi, lo, div, &rhi); 280 result->v[0] = fixed_112_16_to_fixed_48_16 (rhi, rlo, &clampflag); 283 rlo = rounded_sdiv_128_by_49 (hi, lo, div, &rhi) 289 int64_t hi, rhi, lo, rlo, div; local [all...] |
/external/skia/src/core/ |
Sk64.cpp | 252 uint32_t rlo = 0; local 255 shift_left(rhi, rlo); 259 rlo |= 1; 266 fLo = rlo;
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/dalvik/vm/compiler/template/out/ |
CompilerTemplateAsm-mips.S | 272 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, off(rbase); \ 274 #define LOAD64_off(rlo,rhi,rbase,off) lw rlo, off(rbase); \ 277 #define STORE64_off_F(rlo,rhi,rbase,off) s.s rlo, off(rbase); \ 279 #define LOAD64_off_F(rlo,rhi,rbase,off) l.s rlo, off(rbase); \ 283 #define STORE64_off(rlo,rhi,rbase,off) sw rlo, (off+4)(rbase); [all...] |
/external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/ |
ghash-ia64.pl | 213 my ($rlo,$rhi)=("r".eval(16+2*$i),"r".eval(16+2*$i+1)); 215 { .mmi; st8 [r8]=$rlo,16 // Htable[$i].lo 217 shrp $rlo=$rhi,$rlo,4 }//;; 221 { .mmi; st8 [r14]=$rlo,16 // Htable[$i].lo>>4
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/external/openssl/crypto/modes/asm/ |
ghash-ia64.pl | 213 my ($rlo,$rhi)=("r".eval(16+2*$i),"r".eval(16+2*$i+1)); 215 { .mmi; st8 [r8]=$rlo,16 // Htable[$i].lo 217 shrp $rlo=$rhi,$rlo,4 }//;; 221 { .mmi; st8 [r14]=$rlo,16 // Htable[$i].lo>>4
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/dalvik/vm/mterp/out/ |
InterpAsm-mips.S | 201 #define STORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 203 #define LOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 206 #define vSTORE64_off(rlo, rhi, rbase, off) sw rlo, off(rbase); \ 208 #define vLOAD64_off(rlo, rhi, rbase, off) lw rlo, off(rbase); \ 211 #define STORE64_off_F(rlo, rhi, rbase, off) s.s rlo, off(rbase); [all...] |
/external/compiler-rt/test/Unit/ppc/ |
qdiv_test.c | 22 double rhi; double rlo; member in struct:testVector 114 r.lo = edgeCases[i].rlo; [all...] |
qmul_test.c | 22 double rhi; double rlo; member in struct:testVector 114 r.lo = edgeCases[i].rlo; [all...] |
qadd_test.c | 22 double rhi; double rlo; member in struct:testVector 114 r.lo = edgeCases[i].rlo; [all...] |
qsub_test.c | 22 double rhi; double rlo; member in struct:testVector 114 r.lo = edgeCases[i].rlo; [all...] |
/external/chromium/third_party/libjingle/source/talk/session/phone/testdata/ |
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