| /art/compiler/dex/ |
| vreg_analysis.cc | 84 SSARepresentation *ssa_rep = mir->ssa_rep; local
85 if (ssa_rep) {
91 changed |= SetCore(ssa_rep->defs[0], true);
94 changed |= SetRef(ssa_rep->defs[0], true);
97 reg_location_[ssa_rep->defs[0]].wide = true;
98 reg_location_[ssa_rep->defs[1]].wide = true;
99 reg_location_[ssa_rep->defs[1]].high_word = true;
100 DCHECK_EQ(SRegToVReg(ssa_rep->defs[0])+1,
101 SRegToVReg(ssa_rep->defs[1]))
[all...] |
| local_value_numbering.cc | 83 uint16_t res = GetOperandValue(mir->ssa_rep->defs[0]);
84 SetOperandValue(mir->ssa_rep->defs[0], res);
89 uint16_t res = GetOperandValueWide(mir->ssa_rep->defs[0]);
90 SetOperandValueWide(mir->ssa_rep->defs[0], res);
109 uint16_t res = GetOperandValue(mir->ssa_rep->uses[0]);
110 SetOperandValue(mir->ssa_rep->defs[0], res);
118 uint16_t res = GetOperandValueWide(mir->ssa_rep->uses[0]);
119 SetOperandValueWide(mir->ssa_rep->defs[0], res);
128 SetOperandValue(mir->ssa_rep->defs[0], res);
134 SetOperandValue(mir->ssa_rep->defs[0], res)
[all...] |
| mir_optimization.cc | 57 SetConstant(mir->ssa_rep->defs[0], vB);
60 SetConstant(mir->ssa_rep->defs[0], vB << 16);
64 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB));
67 SetConstantWide(mir->ssa_rep->defs[0], d_insn->vB_wide);
70 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB) << 48);
80 for (i = 0; i < mir->ssa_rep->num_uses; i++) {
81 if (!is_constant_v_->IsBitSet(mir->ssa_rep->uses[i])) break;
84 if (i == mir->ssa_rep->num_uses) {
85 SetConstant(mir->ssa_rep->defs[0], constant_values_[mir->ssa_rep->uses[0]])
[all...] |
| mir_dataflow.cc | 956 mir->ssa_rep->num_uses = num_uses;
957 mir->ssa_rep->uses = static_cast<int*>(arena_->Alloc(sizeof(int) * num_uses,
960 mir->ssa_rep->fp_use = static_cast<bool*>(arena_->Alloc(sizeof(bool) * num_uses,
964 HandleSSAUse(mir->ssa_rep->uses, d_insn->arg[i], i);
974 mir->ssa_rep->num_uses = num_uses;
975 mir->ssa_rep->uses = static_cast<int*>(arena_->Alloc(sizeof(int) * num_uses,
978 mir->ssa_rep->fp_use = static_cast<bool*>(arena_->Alloc(sizeof(bool) * num_uses,
982 HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+i, i);
993 mir->ssa_rep =
1043 mir->ssa_rep->num_uses = num_uses
[all...] |
| mir_graph.cc | 745 mir->ssa_rep ? GetDalvikDisassembly(mir) :
887 SSARepresentation* ssa_rep = mir->ssa_rep; local
[all...] |
| mir_graph.h | 242 SSARepresentation* ssa_rep; member in struct:art::MIR
500 DCHECK(num < mir->ssa_rep->num_uses);
501 RegLocation res = reg_location_[mir->ssa_rep->uses[num]];
506 DCHECK_GT(mir->ssa_rep->num_defs, 0);
507 RegLocation res = reg_location_[mir->ssa_rep->defs[0]];
|
| ssa_transformation.cc | 590 int ssa_reg = mir->ssa_rep->defs[0];
611 mir->ssa_rep->num_uses = num_uses;
612 mir->ssa_rep->uses =
614 mir->ssa_rep->fp_use =
622 int *use_ptr = mir->ssa_rep->uses;
|
| /art/compiler/dex/quick/arm/ |
| int_arm.cc | 183 int dest_sreg = mir->ssa_rep->defs[0];
189 LOG(INFO) << "num uses = " << mir->ssa_rep->num_uses;
190 if (mir->ssa_rep->num_uses == 1) {
193 LOG(INFO) << "MOVE case, operands = " << mir->ssa_rep->uses[1] << ", "
194 << mir->ssa_rep->uses[2];
201 if (mir->ssa_rep->num_uses == 1) {
231 RegLocation rl_true = mir_graph_->reg_location_[mir->ssa_rep->uses[1]];
232 RegLocation rl_false = mir_graph_->reg_location_[mir->ssa_rep->uses[2]];
[all...] |
| call_arm.cc | 85 for (int i = 0; i < mir->ssa_rep->num_uses; i++) {
86 int v_reg = mir_graph_->SRegToVReg(mir->ssa_rep->uses[i]);
190 bool wide = (mir->ssa_rep->num_uses == 2);
|
| /art/compiler/dex/quick/ |
| mir_to_lir.cc | 757 SSARepresentation* ssa_rep = work_half->ssa_rep; local
758 work_half->ssa_rep = mir->ssa_rep;
759 mir->ssa_rep = ssa_rep;
|
| ralloc_util.cc | [all...] |
| /art/compiler/dex/portable/ |
| mir_to_gbc.cc | 1718 SSARepresentation* ssa_rep = work_half->ssa_rep; local
[all...] |
