| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Gen.cpp | 124 int tReg = dvmCompilerAllocTemp(cUnit);
126 newLIR3(cUnit, kMipsSltu, tReg, sltuSrc1, sltuSrc2);
128 newLIR3(cUnit, opc, rlDest.highReg, rlDest.highReg, tReg);
129 dvmCompilerFreeTemp(cUnit, tReg);
154 int tReg = dvmCompilerAllocTemp(cUnit);
155 newLIR2(cUnit, kMipsMove, tReg, rlResult.lowReg);
157 tReg, rlResult.lowReg);
158 dvmCompilerFreeTemp(cUnit, tReg);
291 int tReg = dvmCompilerAllocTemp(cUnit);
293 newLIR3(cUnit, kMipsSlt, tReg, reg0, reg1)
[all...] |
| Factory.cpp | 427 int tReg = dvmCompilerAllocTemp(cUnit);
441 first = newLIR3(cUnit, kMipsAddu, tReg , rBase, rIndex);
443 first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale);
444 newLIR3(cUnit, kMipsAddu, tReg , rBase, tReg);
473 res = newLIR3(cUnit, opcode, rDest, 0, tReg);
478 dvmCompilerFreeTemp(cUnit, tReg);
490 int tReg = dvmCompilerAllocTemp(cUnit);
504 first = newLIR3(cUnit, kMipsAddu, tReg , rBase, rIndex);
506 first = opRegRegImm(cUnit, kOpLsl, tReg, rIndex, scale)
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| CodegenDriver.cpp | 564 int tReg = dvmCompilerAllocTemp(cUnit);
566 opRegRegImm(cUnit, kOpLsl, tReg, rlIndex.lowReg, scale);
580 opRegReg(cUnit, kOpAdd, tReg, rlArray.lowReg);
582 opRegRegReg(cUnit, kOpAdd, tReg, rlArray.lowReg, rlIndex.lowReg);
585 /* at this point, tReg points to array, 2 live temps */
589 storeBaseDispWide(cUnit, tReg, dataOffset, rlSrc.lowReg, rlSrc.highReg)
591 dvmCompilerFreeTemp(cUnit, tReg);
596 storeBaseDisp(cUnit, tReg, dataOffset, rlSrc.lowReg, size);
597 dvmCompilerFreeTemp(cUnit, tReg);
788 int tReg = dvmCompilerAllocTemp(cUnit)
[all...] |
| CodegenFactory.cpp | 289 int tReg = dvmCompilerAllocTemp(cUnit);
290 res = newLIR3(cUnit, kMipsSlt, tReg, reg1, reg2);
291 MipsLIR *branch = opCompareBranch(cUnit, kMipsBeqz, tReg, -1);
294 int tReg = dvmCompilerAllocTemp(cUnit);
295 res = newLIR3(cUnit, kMipsSltu, tReg, reg1, reg2);
296 MipsLIR *branch = opCompareBranch(cUnit, kMipsBeqz, tReg, -1);
|
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenDriver.cpp | 732 int tReg = dvmCompilerAllocTemp(cUnit);
735 loadConstantNoClobber(cUnit, tReg, 0);
737 tReg, rlSrc2.lowReg);
738 opRegReg(cUnit, kOpSbc, tReg, rlSrc2.highReg);
739 genRegCopy(cUnit, rlResult.highReg, tReg);
756 int tReg = r12; // Using fixed registers during call sequence
757 opRegRegReg(cUnit, kOpOr, tReg, r2, r3);
758 genRegImmCheck(cUnit, kArmCondEq, tReg, 0, mir->offset, NULL);
864 int tReg = dvmCompilerAllocTemp(cUnit);
865 opRegRegImm(cUnit, kOpAnd, tReg, rlSrc2.lowReg, 31)
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| SsaConverter.java | 361 int tReg = reg + threshold;
363 = localInfo.getStarts(dfBlockIndex).get(tReg);
366 ssaBlocks.get(dfBlockIndex).addPhiInsnForReg(tReg);
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| SsaConverter.java | 362 int tReg = reg + threshold;
364 = localInfo.getStarts(dfBlockIndex).get(tReg);
367 ssaBlocks.get(dfBlockIndex).addPhiInsnForReg(tReg);
|
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Gen.cpp | 281 int tReg = dvmCompilerAllocTemp(cUnit);
282 opRegRegImm(cUnit, kOpLsl, tReg, rlSrc.lowReg, lit);
283 opRegRegReg(cUnit, kOpSub, rlResult.lowReg, tReg, rlSrc.lowReg);
|
| Factory.cpp | 888 int tReg = dvmCompilerAllocTemp(cUnit);
889 loadConstant(cUnit, tReg, checkValue);
890 newLIR2(cUnit, kThumbCmpRR, reg, tReg);
891 dvmCompilerFreeTemp(cUnit, tReg);
|
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Factory.cpp | [all...] |
| /dalvik/vm/compiler/codegen/x86/ |
| AnalysisO1.cpp | 423 int tReg = compileTable[k].physicalReg;
424 allRegs[tReg].isUsed = true;
426 ALOGI("REGALLOC: physical reg %d is used by a GG VR %d %d at beginning of BB", tReg, compileTable[k].regNum, compileTable[k].physicalType);
[all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_arm_toIR.c | [all...] |
