| /dalvik/vm/compiler/ |
| InlineTransformation.cpp | 33 return invoke->vC + rank;
50 * Not all getter instructions have vC but vC will be read by
54 getterInsn.vC = 0;
86 getterInsn.vC = convertRegId(&invokeMIR->dalvikInsn, calleeMethod,
87 getterInsn.vC, isRange);
114 /* Use vC to denote the first argument (ie this) */
116 invokeMIR->dalvikInsn.vC = invokeMIRSlow->dalvikInsn.arg[0];
148 * Not all setter instructions have vC but vC will be read b
[all...] |
| Dataflow.cpp | 859 offset = (int) insn->vC;
884 " v%d..v%d", insn->vC, insn->vC + insn->vA - 1);
897 snprintf(buffer + strlen(buffer), 256, ", v%d", insn->vC);
900 snprintf(buffer + strlen(buffer), 256, ", (#%d)", insn->vC);
969 delta = (int) insn->vC;
1026 snprintf(buffer + strlen(buffer), 256, " #%#x", insn->vC);
1030 snprintf(buffer + strlen(buffer), 256, " @%#x", insn->vC);
1141 handleLiveInUse(useV, defV, liveInV, dInsn->vC);
1143 handleLiveInUse(useV, defV, liveInV, dInsn->vC);
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| OP_INVOKE_VIRTUAL_QUICK.S | 16 GET_VREG(r9, r3) @ r9<- vC ("this" ptr)
|
| OP_EXECUTE_INLINE.S | 16 /* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
60 ldr r0, [rFP, ip, lsl #2] @ r0<- vC
|
| /dalvik/vm/mterp/mips/ |
| OP_INVOKE_VIRTUAL_QUICK.S | 16 GET_VREG(rOBJ, a3) # rOBJ <- vC ("this" ptr)
|
| OP_EXECUTE_INLINE.S | 16 /* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */
71 lw a0, 0(t1) # a0 <- vC
|
| /dalvik/vm/mterp/x86/ |
| OP_INVOKE_VIRTUAL_QUICK.S | 16 GET_VREG_R %ecx %ecx # ecx<- vC ("this" ptr)
|
| /art/compiler/dex/quick/ |
| mir_to_lir.cc | 36 uint32_t vC = mir->dalvikInsn.vC;
191 GenInstanceof(vC, rl_dest, rl_src[0]);
236 GenNewArray(vC, rl_dest, rl_src[0]);
359 GenIGet(vC, opt_flags, kWord, rl_dest, rl_src[0], false, true);
363 GenIGet(vC, opt_flags, kLong, rl_dest, rl_src[0], true, false);
367 GenIGet(vC, opt_flags, kWord, rl_dest, rl_src[0], false, false);
371 GenIGet(vC, opt_flags, kUnsignedHalf, rl_dest, rl_src[0], false, false);
375 GenIGet(vC, opt_flags, kSignedHalf, rl_dest, rl_src[0], false, false);
380 GenIGet(vC, opt_flags, kUnsignedByte, rl_dest, rl_src[0], false, false)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/rtasm/ |
| rtasm_ppc.c | 358 unsigned vC:5;
364 emit_va(struct ppc_function *p, uint op2, uint vD, uint vA, uint vB, uint vC,
372 inst.inst.vC = vC;
377 printf(format, vD, vA, vB, vC);
613 /** vector float mult add: vD = vA * vB + vC */
615 ppc_vmaddfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC)
618 emit_va(p, 46, vD, vA, vC, vB, "vmaddfp\tv%u, v%u, v%u, v%u\n");
621 /** vector float negative mult subtract: vD = vA - vB * vC */
623 ppc_vnmsubfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC)
[all...] |
| rtasm_ppc.h | 108 /** vector float mult add: vD = vA * vB + vC */
110 ppc_vmaddfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
112 /** vector float negative mult subtract: vD = vA - vB * vC */
114 ppc_vnmsubfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
216 ppc_vperm(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
220 ppc_vsel(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
|
| /external/mesa3d/src/gallium/auxiliary/rtasm/ |
| rtasm_ppc.c | 358 unsigned vC:5;
364 emit_va(struct ppc_function *p, uint op2, uint vD, uint vA, uint vB, uint vC,
372 inst.inst.vC = vC;
377 printf(format, vD, vA, vB, vC);
613 /** vector float mult add: vD = vA * vB + vC */
615 ppc_vmaddfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC)
618 emit_va(p, 46, vD, vA, vC, vB, "vmaddfp\tv%u, v%u, v%u, v%u\n");
621 /** vector float negative mult subtract: vD = vA - vB * vC */
623 ppc_vnmsubfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC)
[all...] |
| rtasm_ppc.h | 108 /** vector float mult add: vD = vA * vB + vC */
110 ppc_vmaddfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
112 /** vector float negative mult subtract: vD = vA - vB * vC */
114 ppc_vnmsubfp(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
216 ppc_vperm(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
220 ppc_vsel(struct ppc_function *p, uint vD, uint vA, uint vB, uint vC);
|
| /art/compiler/dex/portable/ |
| mir_to_gbc.cc | 694 uint32_t vC = mir->dalvikInsn.vC;
[all...] |
| /dalvik/vm/analysis/ |
| Liveness.cpp | 403 /* action <- vA, vB, vC */
406 GEN(workBits, decInsn.vC);
410 /* action <- vA(wide), vB, vC */
413 GEN(workBits, decInsn.vC);
441 GEN(workBits, decInsn.vC + idx);
580 /* vA <- vB, vC */
583 GEN(workBits, decInsn.vC);
587 /* vA(wide) <- vB, vC */
590 GEN(workBits, decInsn.vC);
596 /* vA <- vB(wide), vC(wide) *
[all...] |
| DexVerify.cpp | 576 * vA holds word count, vC holds index of first reg.
584 * vA/vC are unsigned 8-bit/16-bit quantities for /range instructions,
587 if (pDecInsn->vA + pDecInsn->vC > registersSize) {
589 pDecInsn->vA, pDecInsn->vC, registersSize);
961 okay &= checkTypeIndex(pDvmDex, decInsn.vC);
970 okay &= checkNewArray(pDvmDex, decInsn.vC);
1016 okay &= checkRegisterIndex(meth, decInsn.vC);
1022 okay &= checkRegisterIndex(meth, decInsn.vC);
[all...] |
| CodeVerify.cpp | [all...] |
| /dalvik/libdex/ |
| InstrUtils.h | 57 kFmt35c, // op {vC,vD,vE,vF,vG}, thing@BBBB
133 u4 vC;
134 u4 arg[5]; /* vC/D/E/F/G in invoke or filled-new-array */
|
| InstrUtils.cpp | 544 pDec->vC = FETCH(1) >> 8;
549 pDec->vC = (s1) (FETCH(1) >> 8); // sign-extend 8-bit value
555 pDec->vC = (s2) FETCH(1); // sign-extend 16-bit value
561 pDec->vC = FETCH(1);
579 case kFmt35c: // op {vC, vD, vE, vF, vG}, thing@BBBB
604 * also copy the first argument (if any) into vC. (The
626 case 1: pDec->vC = pDec->arg[0] = regList & 0x0f; break;
639 pDec->vC = FETCH(2);
|
| /external/mksh/src/ |
| edit.c | [all...] |
| /art/runtime/ |
| dex_instruction.cc | 137 default: LOG(FATAL) << "Tried to access vC of instruction " << Name() <<
207 void Instruction::Decode(uint32_t &vA, uint32_t &vB, uint64_t &vB_wide, uint32_t &vC, uint32_t arg[]) const {
256 vC = FETCH(1) >> 8;
261 vC = (int8_t) (FETCH(1) >> 8); // sign-extend 8-bit value
267 vC = (int16_t) FETCH(1); // sign-extend 16-bit value
272 vC = FETCH(1);
290 case k35c: // op {vC, vD, vE, vF, vG}, thing@BBBB
313 * also copy the first argument (if any) into vC. (The
323 case 1: vC = arg[0] = regList & 0x0f; break;
334 vC = FETCH(2)
[all...] |
| dex_instruction.h | 115 k35c, // op {vC, vD, vE, vF, vG}, thing@BBBB (B: count, A: vG)
155 void Decode(uint32_t &vA, uint32_t &vB, uint64_t &vB_wide, uint32_t &vC, uint32_t arg[]) const;
441 uint32_t vC;
442 uint32_t arg[5]; /* vC/D/E/F/G in invoke or filled-new-array */
446 inst->Decode(vA, vB, vB_wide, vC, arg);
|
| /dalvik/vm/compiler/codegen/x86/ |
| LowerInvoke.cpp | [all...] |
| LowerObject.cpp | 569 u4 vC = (u4)FETCH(2);
576 spillVirtualReg(vC+k, LowOpndRegType_gp, true); //will update refCount
579 load_effective_addr(vC*4, PhysicalReg_FP, true, 7, false); //addr
|
| /dalvik/dexdump/ |
| DexDump.cpp | 737 index = pDecInsn->vC;
951 printf(" v%d, v%d, v%d", pDecInsn->vA, pDecInsn->vB, pDecInsn->vC);
955 pDecInsn->vA, pDecInsn->vB, (s4)pDecInsn->vC, (u1)pDecInsn->vC);
959 s4 targ = (s4) pDecInsn->vC;
968 pDecInsn->vA, pDecInsn->vB, (s4)pDecInsn->vC, (u2)pDecInsn->vC);
996 case kFmt35c: // op {vC, vD, vE, vF, vG}, thing@BBBB
1021 printf("v%d", pDecInsn->vC + i);
1023 printf(", v%d", pDecInsn->vC + i)
[all...] |
| /art/compiler/dex/ |
| mir_dataflow.cc | 899 HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vC);
901 HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vC+1);
912 HandleLiveInUse(use_v, def_v, live_in_v, d_insn->vC+i);
982 HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+i, i);
1089 HandleSSAUse(mir->ssa_rep->uses, d_insn->vC, num_uses++);
1092 HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+1, num_uses++);
[all...] |
