| /external/llvm/test/CodeGen/R600/ |
| llvm.pow.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
8 %r0 = call float @llvm.R600.load.input(i32 0)
9 %r1 = call float @llvm.R600.load.input(i32 1)
15 declare float @llvm.R600.load.input(i32) readnone
|
| rv7x0_count3.ll | 1 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=rv710 | FileCheck %s
6 %1 = call float @llvm.R600.load.input(i32 4)
7 %2 = call float @llvm.R600.load.input(i32 5)
8 %3 = call float @llvm.R600.load.input(i32 6)
9 %4 = call float @llvm.R600.load.input(i32 7)
33 call void @llvm.R600.store.swizzle(<4 x float> %27, i32 0, i32 2)
40 declare float @llvm.R600.load.input(i32) #1
43 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| load-input-fold.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=cayman
6 %0 = call float @llvm.R600.load.input(i32 4)
7 %1 = call float @llvm.R600.load.input(i32 5)
8 %2 = call float @llvm.R600.load.input(i32 6)
9 %3 = call float @llvm.R600.load.input(i32 7)
10 %4 = call float @llvm.R600.load.input(i32 8)
11 %5 = call float @llvm.R600.load.input(i32 9)
12 %6 = call float @llvm.R600.load.input(i32 10)
13 %7 = call float @llvm.R600.load.input(i32 11)
14 %8 = call float @llvm.R600.load.input(i32 12
[all...] |
| sign_extend.ll | 2 ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s
|
| dot4-folding.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
21 call void @llvm.R600.store.swizzle(<4 x float> %3, i32 0, i32 0)
26 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| mad_int24.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK
3 ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
|
| mul_int24.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK
2 ; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK
3 ; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK
|
| fetch-limits.r600.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=r600 | FileCheck %s
2 ; RUN: llc < %s -march=r600 -mcpu=rs880 | FileCheck %s
3 ; RUN: llc < %s -march=r600 -mcpu=rv670 | FileCheck %s
5 ; R600 supports 8 fetches in a clause
41 call void @llvm.R600.store.swizzle(<4 x float> %bcde, i32 0, i32 1)
48 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
|
| fetch-limits.r700+.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=rv710 | FileCheck %s
2 ; RUN: llc < %s -march=r600 -mcpu=rv730 | FileCheck %s
3 ; RUN: llc < %s -march=r600 -mcpu=rv770 | FileCheck %s
4 ; RUN: llc < %s -march=r600 -mcpu=cedar | FileCheck %s
5 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
6 ; RUN: llc < %s -march=r600 -mcpu=sumo | FileCheck %s
7 ; RUN: llc < %s -march=r600 -mcpu=juniper | FileCheck %s
8 ; RUN: llc < %s -march=r600 -mcpu=cypress | FileCheck %s
9 ; RUN: llc < %s -march=r600 -mcpu=barts | FileCheck %s
10 ; RUN: llc < %s -march=r600 -mcpu=turks | FileCheck %
[all...] |
| swizzle-export.ll | 1 ; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
11 %0 = call float @llvm.R600.load.input(i32 4)
12 %1 = call float @llvm.R600.load.input(i32 5)
13 %2 = call float @llvm.R600.load.input(i32 6)
14 %3 = call float @llvm.R600.load.input(i32 7)
71 call void @llvm.R600.store.swizzle(<4 x float> %59, i32 60, i32 1)
76 call void @llvm.R600.store.swizzle(<4 x float> %63, i32 0, i32 2)
81 call void @llvm.R600.store.swizzle(<4 x float> %67, i32 1, i32 2)
86 call void @llvm.R600.store.swizzle(<4 x float> %71, i32 2, i32 2)
91 call void @llvm.R600.store.swizzle(<4 x float> %75, i32 3, i32 2
[all...] |
| r600cfg.ll | 1 ;RUN: llc < %s -march=r600 -mcpu=redwood
6 %0 = call float @llvm.R600.load.input(i32 4)
7 %1 = call float @llvm.R600.load.input(i32 5)
8 %2 = call float @llvm.R600.load.input(i32 6)
9 %3 = call float @llvm.R600.load.input(i32 7)
36 call void @llvm.R600.store.stream.output(<4 x float> %19, i32 0, i32 0, i32 1)
41 call void @llvm.R600.store.stream.output(<4 x float> %23, i32 0, i32 0, i32 2)
46 call void @llvm.R600.store.stream.output(<4 x float> %27, i32 0, i32 0, i32 4)
51 call void @llvm.R600.store.swizzle(<4 x float> %31, i32 60, i32 1)
56 call void @llvm.R600.store.swizzle(<4 x float> %35, i32 0, i32 2
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/ |
| r600_resource.c | 69 void r600_init_context_resource_functions(struct r600_context *r600)
71 r600->context.get_transfer = u_get_transfer_vtbl;
72 r600->context.transfer_map = u_transfer_map_vtbl;
73 r600->context.transfer_flush_region = u_default_transfer_flush_region;
74 r600->context.transfer_unmap = u_transfer_unmap_vtbl;
75 r600->context.transfer_destroy = u_transfer_destroy_vtbl;
76 r600->context.transfer_inline_write = u_default_transfer_inline_write;
|
| r600_resource.h | 26 #include "r600.h"
94 unsigned cb_color_size; /* R600 only */
99 unsigned cb_color_fmask; /* CB_COLORn_FMASK (EG) or CB_COLORn_FRAG (r600) */
101 unsigned cb_color_cmask; /* CB_COLORn_CMASK (EG) or CB_COLORn_TILE (r600) */
103 unsigned cb_color_mask; /* R600 only */
104 struct r600_resource *cb_buffer_fmask; /* Used for FMASK relocations. R600 only */
105 struct r600_resource *cb_buffer_cmask; /* Used for CMASK relocations. R600 only */
108 unsigned db_depth_info; /* DB_Z_INFO (EG) or DB_DEPTH_INFO (r600) */
109 unsigned db_depth_base; /* DB_Z_READ/WRITE_BASE (EG) or DB_DEPTH_BASE (r600) */
115 unsigned db_prefetch_limit; /* R600 only *
[all...] |
| Makefile.am | 22 # so that we can link it with the r600 objects.
23 libr600_a_AR = $(top_srcdir)/bin/mklib -o r600 -static
|
| r600_translate.c | 31 void r600_translate_index_buffer(struct r600_context *r600,
41 u_upload_alloc(r600->uploader, 0, count * 2,
45 &r600->context, ib, 0, ib->offset, count, ptr);
|
| /external/mesa3d/src/gallium/drivers/r600/ |
| r600_resource.c | 69 void r600_init_context_resource_functions(struct r600_context *r600)
71 r600->context.get_transfer = u_get_transfer_vtbl;
72 r600->context.transfer_map = u_transfer_map_vtbl;
73 r600->context.transfer_flush_region = u_default_transfer_flush_region;
74 r600->context.transfer_unmap = u_transfer_unmap_vtbl;
75 r600->context.transfer_destroy = u_transfer_destroy_vtbl;
76 r600->context.transfer_inline_write = u_default_transfer_inline_write;
|
| r600_resource.h | 26 #include "r600.h"
94 unsigned cb_color_size; /* R600 only */
99 unsigned cb_color_fmask; /* CB_COLORn_FMASK (EG) or CB_COLORn_FRAG (r600) */
101 unsigned cb_color_cmask; /* CB_COLORn_CMASK (EG) or CB_COLORn_TILE (r600) */
103 unsigned cb_color_mask; /* R600 only */
104 struct r600_resource *cb_buffer_fmask; /* Used for FMASK relocations. R600 only */
105 struct r600_resource *cb_buffer_cmask; /* Used for CMASK relocations. R600 only */
108 unsigned db_depth_info; /* DB_Z_INFO (EG) or DB_DEPTH_INFO (r600) */
109 unsigned db_depth_base; /* DB_Z_READ/WRITE_BASE (EG) or DB_DEPTH_BASE (r600) */
115 unsigned db_prefetch_limit; /* R600 only *
[all...] |
| Makefile.am | 22 # so that we can link it with the r600 objects.
23 libr600_a_AR = $(top_srcdir)/bin/mklib -o r600 -static
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600IntrinsicsNoOpenCL.td | 1 //===-- R600Intrinsics.td - R600 Instrinsic defs -------*- tablegen -*-----===//
10 // R600 Intrinsic Definitions
14 let TargetPrefix = "R600", isTarget = 1 in {
18 let TargetPrefix = "r600", isTarget = 1 in {
40 } // End TargetPrefix = "r600"
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600IntrinsicsNoOpenCL.td | 1 //===-- R600Intrinsics.td - R600 Instrinsic defs -------*- tablegen -*-----===//
10 // R600 Intrinsic Definitions
14 let TargetPrefix = "R600", isTarget = 1 in {
18 let TargetPrefix = "r600", isTarget = 1 in {
40 } // End TargetPrefix = "r600"
|
| /external/llvm/include/llvm/IR/ |
| IntrinsicsR600.td | 1 //===- IntrinsicsR600.td - Defines R600 intrinsics ---------*- tablegen -*-===//
10 // This file defines all of the R600-specific intrinsics.
14 let TargetPrefix = "r600" in {
36 } // End TargetPrefix = "r600"
|
| /external/llvm/lib/Target/R600/ |
| R600TextureIntrinsicsReplacer.cpp | 11 /// This pass translates tgsi-like texture intrinsics into R600 texture
204 ReplaceCallInst(I, TexQSign, "llvm.R600.txf", SrcSelect,
255 return "R600 Texture Intrinsics Replacer";
264 ReplaceTexIntrinsic(I, false, TexSign, "llvm.R600.tex", "llvm.R600.texc");
268 ReplaceTexIntrinsic(I, true, TexSign, "llvm.R600.txl", "llvm.R600.txlc");
272 ReplaceTexIntrinsic(I, true, TexSign, "llvm.R600.txb", "llvm.R600.txbc");
280 ReplaceTexIntrinsic(I, false, TexQSign, "llvm.R600.txq", "llvm.R600.txq")
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/TargetInfo/ |
| AMDGPUTargetInfo.cpp | 24 RegisterTarget<Triple::r600, false>
25 R600(TheAMDGPUTarget, "r600", "AMD GPUs HD2XXX-HD6XXX");
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/ |
| r600_translate.c | 31 void r600_translate_index_buffer(struct r600_context *r600,
41 u_upload_alloc(r600->uploader, 0, count * 2,
45 &r600->context, ib, 0, ib->offset, count, ptr);
|
| /external/llvm/lib/Target/R600/InstPrinter/ |
| LLVMBuild.txt | 1 ;===- ./lib/Target/R600/InstPrinter/LLVMBuild.txt -----------*- Conf -*--===;
21 parent = R600
23 add_to_library_groups = R600
|
