| /external/llvm/test/CodeGen/ARM/ |
| fast-isel-ext.ll | 74 ; sext
83 %r = sext i1 %a to i8
94 %r = sext i1 %a to i16
105 %r = sext i1 %a to i32
115 %r = sext i8 %a to i16
125 %r = sext i8 %a to i32
135 %r = sext i16 %a to i32
|
| /external/llvm/test/CodeGen/SystemZ/ |
| int-cmp-04.ll | 12 %rhs = sext i16 %half to i64
26 %rhs = sext i16 %half to i64
42 %rhs = sext i16 %half to i64
56 %rhs = sext i16 %half to i64
70 %rhs = sext i16 %half to i64
86 %rhs = sext i16 %half to i64
102 %rhs = sext i16 %half to i64
|
| and-06.ll | 64 %ext = sext i8 %val to i32
77 %ext = sext i8 %val to i64
90 %ext = sext i8 %val to i32
103 %ext = sext i8 %val to i64
|
| or-06.ll | 64 %ext = sext i8 %val to i32
77 %ext = sext i8 %val to i64
90 %ext = sext i8 %val to i32
103 %ext = sext i8 %val to i64
|
| xor-06.ll | 64 %ext = sext i8 %val to i32
77 %ext = sext i8 %val to i64
90 %ext = sext i8 %val to i32
103 %ext = sext i8 %val to i64
|
| /external/llvm/test/CodeGen/Hexagon/ |
| extload-combine.ll | 34 %conv2 = sext i16 %0 to i64
56 %conv2 = sext i8 %0 to i64
78 %conv = sext i32 %0 to i64
|
| fusedandshift.ll | 9 %conv1 = sext i16 %0 to i32
|
| /external/llvm/test/CodeGen/Mips/ |
| spill-copy-acreg.ll | 32 %sext = sext <2 x i1> %cmp3 to <2 x i16>
33 store <2 x i16> %sext, <2 x i16>* @g4, align 4
|
| lb1.ll | 11 %conv = sext i8 %0 to i32
|
| lh1.ll | 10 %conv = sext i16 %0 to i32
|
| mips64ext.ll | 16 %conv = sext i32 %a to i64
|
| /external/llvm/test/CodeGen/Thumb2/ |
| 2009-07-21-ISelBug.ll | 24 %15 = sext i8 %6 to i32 ; <i32> [#uses=2]
25 %16 = sext i16 %10 to i32 ; <i32> [#uses=2]
26 %17 = sext i16 %13 to i32 ; <i32> [#uses=2]
|
| 2013-03-06-vector-sext-operand-scalarize.ll | 17 %Se = sext <1 x i1> %vec to <1 x i64>
|
| bfx.ll | 8 %t3 = sext i11 %t2 to i32
|
| thumb2-smla.ll | 10 %tmp = sext i16 %x to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/X86/ |
| 2009-11-13-VirtRegRewriterBug.ll | 47 %1 = sext i16 undef to i32 ; <i32> [#uses=1]
48 %2 = sext i16 undef to i32 ; <i32> [#uses=1]
49 %3 = sext i16 undef to i32 ; <i32> [#uses=1]
50 %4 = sext i16 undef to i32 ; <i32> [#uses=1]
51 %5 = sext i16 undef to i32 ; <i32> [#uses=1]
52 %6 = sext i16 undef to i32 ; <i32> [#uses=1]
54 %7 = sext i16 undef to i32 ; <i32> [#uses=1]
57 %8 = sext i16 %tmp209 to i32 ; <i32> [#uses=1]
58 %9 = sext i16 undef to i32 ; <i32> [#uses=1]
59 %10 = sext i16 undef to i32 ; <i32> [#uses=1
[all...] |
| sext-i1.ll | 30 %iftmp.0.0 = sext i1 %0 to i32
51 %cond = sext i1 %not.tobool to i32 ; <i32> [#uses=1]
52 %conv = sext i1 %not.tobool to i64 ; <i64> [#uses=1]
|
| 2009-01-26-WrongCheck.ll | 12 %t814 = sext i32 %t711 to i64 ; <i64> [#uses=1]
|
| 2011-07-13-BadFrameIndexDisplacement.ll | 16 %tmp10 = sext i8 %tmp9 to i32
|
| alldiv-divdi3.ll | 10 %conv4 = sext i32 %argc to i64
|
| allrem-moddi3.ll | 12 %conv4 = sext i32 %argc to i64
|
| /external/llvm/test/Transforms/InstCombine/ |
| 2010-03-03-ExtElim.ll | 24 ret i1 icmp sgt (i32 sext (i16 trunc (i32 select (i1 icmp eq (i32* getelementptr inbounds ([1 x i32]* @a, i32 0, i32 0), i32* @d), i32 0, i32 1) to i16) to i32), i32 65535)
25 ; CHECK: ret i1 icmp sgt (i32 sext (i16 trunc (i32 select (i1 icmp eq (i32* getelementptr inbounds ([1 x i32]* @a, i32 0, i32 0), i32* @d), i32 0, i32 1) to i16) to i32), i32 65535)
30 ret i1 icmp sgt (i32 sext (i16 trunc (i32 select (i1 icmp eq (i32* getelementptr inbounds ([1 x i32]* @a, i32 0, i32 0), i32* @d), i32 0, i32 1) to i16) to i32), i32 42)
|
| /external/llvm/test/Transforms/LoopVectorize/ |
| i8-induction.ll | 18 %conv2 = sext i8 %c.015 to i32
24 %sext = shl i32 %add, 24
25 %phitmp14 = icmp slt i32 %sext, 268435456
|
| /external/llvm/test/CodeGen/PowerPC/ |
| coalesce-ext.ll | 2 ; Check that the peephole optimizer knows about sext and zext instructions.
|
| vec_extload.ll | 8 ; Altivec does not provides an sext intruction, so it expands
14 %c = sext <16 x i4> %b to <16 x i8>
36 %c = sext <8 x i8> %b to <8 x i16>
60 %c = sext <4 x i16> %b to <4 x i32>
|
