| /external/llvm/test/CodeGen/X86/ |
| movmsk.ll | 106 %idxprom = sext i32 %0 to i64
119 %idxprom = sext i32 %1 to i64
|
| /external/llvm/test/Transforms/SimplifyCFG/ |
| 2005-06-16-PHICrash.ll | 27 %tmp.12 = sext i8 %tmp.1 to i32 ; <i32> [#uses=1]
30 %tmp.14 = sext i8 %tmp.1 to i32 ; <i32> [#uses=1]
|
| 2006-12-08-Ptr-ICmp-Branch.ll | 84 %tmp14.upgrd.13 = sext i8 %tmp14 to i32 ; <i32> [#uses=1]
111 %tmp28.upgrd.15 = sext i8 %tmp28 to i32 ; <i32> [#uses=1]
|
| /frameworks/rs/driver/runtime/arch/ |
| neon.ll | 371 %1 = sext <2 x i8> %v1 to <2 x i32>
372 %2 = sext <2 x i8> %v2 to <2 x i32>
379 %1 = sext <3 x i8> %v1 to <3 x i32>
380 %2 = sext <3 x i8> %v2 to <3 x i32>
390 %1 = sext <4 x i8> %v1 to <4 x i32>
391 %2 = sext <4 x i8> %v2 to <4 x i32>
404 %1 = sext <2 x i16> %v1 to <2 x i32>
405 %2 = sext <2 x i16> %v2 to <2 x i32>
412 %1 = sext <3 x i16> %v1 to <3 x i32>
413 %2 = sext <3 x i16> %v2 to <3 x i32
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAddSub.cpp | 888 /// (sext (add LHS, RHS)) === (add (sext LHS), (sext RHS))
946 // If we have ADD(XOR(AND(X, 0xFF), 0x80), 0xF..F80), it's a sext.
947 // If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext.
963 Value *NewShl = Builder->CreateShl(XorLHS, ShAmt, "sext");
[all...] |
| /external/llvm/test/DebugInfo/X86/ |
| misched-dbg-value.ll | 44 %idxprom = sext i32 %add to i64, !dbg !69
48 %idxprom4 = sext i32 %add3 to i64, !dbg !73
52 %idxprom7 = sext i32 %add6 to i64, !dbg !74
71 %idxprom14 = sext i32 %sub to i64, !dbg !78
78 %idxprom23 = sext i32 %add22 to i64, !dbg !79
|
| /external/llvm/test/Transforms/InstCombine/ |
| getelementptr.ll | 157 ; CHECK: sext i32 %Idx to i64
238 %sext = trunc i64 %tmp9 to i32 ; <i32> [#uses=1]
239 %tmp27.i = sext i32 %sext to i64 ; <i64> [#uses=1]
456 ; CHECK: = sext i32 %n to i64
|
| /external/llvm/unittests/Support/ |
| ConstantRangeTest.cpp | 201 TEST_F(ConstantRangeTest, SExt) {
210 EXPECT_EQ(SOne, ConstantRange(One.getLower().sext(20),
211 One.getUpper().sext(20)));
212 EXPECT_EQ(SSome, ConstantRange(Some.getLower().sext(20),
213 Some.getUpper().sext(20)));
|
| /external/llvm/test/CodeGen/ARM/ |
| vector-DAGCombine.ll | 68 %0 = sext <4 x i1> zeroinitializer to <4 x i16>
127 ; constant folding the multiply because the "sext undef" was translated to
131 %1 = sext <8 x i8> undef to <8 x i16>
|
| vbits.ll | 450 %tmp5 = sext <8 x i1> %tmp4 to <8 x i8>
461 %tmp5 = sext <4 x i1> %tmp4 to <4 x i16>
472 %tmp5 = sext <2 x i1> %tmp4 to <2 x i32>
483 %tmp5 = sext <16 x i1> %tmp4 to <16 x i8>
494 %tmp5 = sext <8 x i1> %tmp4 to <8 x i16>
505 %tmp5 = sext <4 x i1> %tmp4 to <4 x i32>
|
| select_xform.ll | 210 ; Fold sext i1 into predicated sub
221 %conv = sext i1 %cmp to i32
|
| /external/llvm/test/Transforms/GVN/ |
| pre-load.ll | 215 %tmp = sext i32 %1 to i64
286 %tmp = sext i32 %1 to i64
331 %tmp = sext i32 %0 to i64
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| 2009-04-15-shorten-iv-vars-2.ll | 98 %63 = sext i32 %i.0.reg2mem.0 to i64 ; <i64> [#uses=1]
122 %86 = sext i32 %85 to i64 ; <i64> [#uses=1]
146 %109 = sext i32 %108 to i64 ; <i64> [#uses=1]
|
| /external/llvm/test/Transforms/InstSimplify/ |
| compare.ll | 233 define i1 @sext(i32 %x) {
234 ; CHECK-LABEL: @sext(
235 %e1 = sext i32 %x to i64
236 %e2 = sext i32 %x to i64
244 %e = sext i1 %x to i32
252 %e = sext i1 1 to i32
|
| /external/llvm/test/CodeGen/Generic/ |
| select.ll | 154 %cast115 = sext i32 %reg114 to i64 ; <i64> [#uses=1]
159 %cast117 = sext i32 %reg118 to i64 ; <i64> [#uses=2]
|
| /external/llvm/test/CodeGen/SPARC/ |
| 64bit.ll | 151 %c2 = sext i32 %c to i64
154 %d2 = sext i16 %d to i64
|
| /external/llvm/test/CodeGen/SystemZ/ |
| int-mul-08.ll | 29 %ax = sext i64 %a to i128
30 %bx = sext i64 %b to i128
|
| /external/llvm/test/Transforms/LoopStrengthReduce/X86/ |
| 2012-01-13-phielim.ll | 22 %sext.i = shl i64 %i.05.i, 32
23 %idx.ext.i = ashr exact i64 %sext.i, 32
|
| /external/llvm/test/Transforms/LoopVectorize/ |
| memdep.ll | 76 %idxprom = sext i32 %i.01 to i64
81 %idxprom2 = sext i32 %add1 to i64
|
| scev-exitlim-crash.ll | 53 %idx.ext = sext i32 %add10 to i64
59 %3 = sext i32 %i.213 to i64
|
| /external/llvm/include/llvm/IR/ |
| Instruction.def | 147 HANDLE_CAST_INST(35, SExt , SExtInst ) // Sign extend integers
|
| /external/llvm/lib/CodeGen/ |
| PeepholeOptimizer.cpp | 211 // %reg1025 = <sext> %reg1024
217 // %reg1025 = <sext> %reg1024
224 // the COPY here, it will give us the value after the <sext>, not the
225 // original value of %reg1024 before <sext>.
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 68 StoreParamS32, // to sext and store a <32bit value, not used currently
|
| /external/llvm/test/Analysis/BasicAA/ |
| featuretest.ll | 118 %sum13.cast31 = sext i5 %j to i6 ; <i6> [#uses=1]
|
| /external/llvm/test/Analysis/TypeBasedAliasAnalysis/ |
| placement-tbaa.ll | 77 %conv = sext i32 %13 to i64
|
