| /external/llvm/test/Transforms/InstCombine/ |
| 2008-01-21-MismatchedCastAndCompare.ll | 14 %a = sext i8 %A to i32
15 %b = sext i8 %B to i32
|
| apint-zext2.ll | 7 %c2 = sext i533 %c1 to i1024
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| zext.ll | 6 %c2 = sext i32 %c1 to i64 ; <i64> [#uses=1]
|
| /external/llvm/test/CodeGen/Generic/ |
| 2006-04-28-Sign-extend-bool.ll | 7 %tmp99100 = sext i8 %tmp99.upgrd.1 to i32 ; <i32> [#uses=1]
|
| i128-arith.ll | 5 %tmp1 = sext i64 %y to i128
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| /external/llvm/test/CodeGen/R600/ |
| sign_extend.ll | 9 %2 = sext i32 %1 to i64
|
| fcmp.ll | 12 %sext = sext i1 %cmp to i32
13 store i32 %sext, i32 addrspace(1)* %out
|
| /external/llvm/test/CodeGen/X86/ |
| 2006-10-09-CycleInDAG.ll | 5 %tmp201.upgrd.1 = sext i32 %tmp201 to i64 ; <i64> [#uses=1]
|
| 2011-10-11-srl.ll | 7 %r = sext <2 x i8> %t to <2 x i16>
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| widen_conv-2.ll | 9 %signext = sext <2 x i16> %src to <2 x i32> ; <<12 x i8>> [#uses=1]
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| x86-64-arg.ll | 12 %tmp12 = sext i16 %X to i32 ; <i32> [#uses=1]
|
| avx-sext.ll | 9 %B = sext <8 x i16> %A to <8 x i32>
17 %B = sext <4 x i32> %A to <4 x i64>
38 %Y = sext <4 x i16> %X to <4 x i32>
58 %Y = sext <4 x i8> %X to <4 x i32>
79 %Y = sext <2 x i8> %X to <2 x i64>
100 %Y = sext <2 x i16> %X to <2 x i64>
121 %Y = sext <2 x i32> %X to <2 x i64>
142 %Y = sext <8 x i8> %X to <8 x i16>
153 %extmask = sext <4 x i1> %mask to <4 x i64>
164 %extmask = sext <4 x i8> %mask to <4 x i64
[all...] |
| sse-commute.ll | 14 %sext = sext <4 x i1> %cmp to <4 x i32> ; <<4 x i32>> [#uses=1]
15 %and = and <4 x i32> %tmp6, %sext ; <<4 x i32>> [#uses=1]
|
| avx2-conversions.ll | 27 %B = sext <4 x i32> %A to <4 x i64>
36 %B = sext <8 x i16> %A to <8 x i32>
71 %Y = sext <4 x i32> %X to <4 x i64>
80 %Y = sext <4 x i8> %X to <4 x i64>
89 %Y = sext <4 x i16> %X to <4 x i64>
98 %Y = sext <8 x i16> %X to <8 x i32>
107 %Y = sext <8 x i8> %X to <8 x i32>
|
| vec_compare.ll | 10 %D = sext <4 x i1> %C to <4 x i32>
21 %D = sext <4 x i1> %C to <4 x i32>
31 %D = sext <4 x i1> %C to <4 x i32>
41 %D = sext <4 x i1> %C to <4 x i32>
52 %D = sext <2 x i1> %C to <2 x i64>
65 %D = sext <2 x i1> %C to <2 x i64>
88 %D = sext <2 x i1> %C to <2 x i64>
105 %D = sext <2 x i1> %C to <2 x i64>
124 %D = sext <2 x i1> %C to <2 x i64>
143 %D = sext <2 x i1> %C to <2 x i64
[all...] |
| /external/llvm/test/Transforms/ConstProp/ |
| 2006-12-01-bool-casts.ll | 7 %A = sext i1 true to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| 2009-04-22-TruncCast.ll | 4 %A = sext i8 %x to i32
10 %A = sext i16 %x to i32
16 %A = sext i16 %x to i32
|
| sext-iv-0.ll | 3 ; Convert (sext {-128,+,1}) to {sext(-128),+,sext(1)}, since the
23 %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
29 %6 = sext i8 %0 to i64 ; <i64> [#uses=1]
|
| /external/llvm/test/CodeGen/ARM/ |
| ldr_ext.ll | 20 %tmp1.s = sext i8 %tmp.s to i32
27 %tmp1.s = sext i16 %tmp.s to i32
35 %tmp1.s = sext i16 %tmp.s to i32
|
| 2012-08-09-neon-extload.ll | 19 %i32val = sext <2 x i8> %i8val to <2 x i32>
33 %i64val = sext <2 x i8> %i8val to <2 x i64>
40 ; %i64val = sext <2 x i8> %i8val to <2 x i64>
51 %i16val = sext <4 x i8> %i8val to <4 x i16>
66 %i16val = sext <4 x i8> %i8val to <4 x i32>
80 %i32val = sext <2 x i16> %i16val to <2 x i32>
95 %i64val = sext <2 x i16> %i16val to <2 x i64>
|
| /external/llvm/test/CodeGen/NVPTX/ |
| sext-in-reg.ll | 10 %sext = shl i64 %a, 56
11 %conv1 = ashr exact i64 %sext, 56
28 %sext = shl i64 %a, 32
29 %conv1 = ashr exact i64 %sext, 32
46 %sext = shl i64 %a, 48
47 %conv1 = ashr exact i64 %sext, 48
64 %sext = shl i32 %a, 24
65 %conv1 = ashr exact i32 %sext, 24
82 %sext = shl i32 %a, 16
83 %conv1 = ashr exact i32 %sext, 1
[all...] |
| /external/llvm/test/ExecutionEngine/ |
| test-interp-vec-cast.ll | 26 sext <2 x i1> <i1 true,i1 true> to <2 x i8>
27 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i8>
28 sext <2 x i1> <i1 true,i1 true> to <2 x i16>
29 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i16>
30 sext <2 x i1> <i1 true,i1 true> to <2 x i32>
31 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i32>
32 sext <2 x i1> <i1 true,i1 true> to <2 x i64>
33 sext <3 x i1> <i1 true,i1 false,i1 true> to <3 x i64>
34 sext <3 x i8> <i8 -4, i8 0, i8 4> to <3 x i16>
35 sext <2 x i8> <i8 -4, i8 4> to <2 x i16
[all...] |
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| cast.ll | 14 ;CHECK: sext
19 %conv = sext i8 %0 to i32
23 %conv3 = sext i8 %1 to i32
28 %conv6 = sext i8 %2 to i32
33 %conv9 = sext i8 %3 to i32
|
| /external/llvm/test/CodeGen/AArch64/ |
| neon-compare-instructions.ll | 6 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
13 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
20 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
27 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
34 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
41 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
48 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
57 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
66 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
75 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16
[all...] |
| /external/llvm/test/CodeGen/XCore/ |
| misc-intrinsics.ll | 8 declare i32 @llvm.xcore.sext(i32, i32)
47 define i32 @sext(i32 %a, i32 %b) {
48 ; CHECK-LABEL: sext:
49 ; CHECK: sext r0, r1
50 %result = call i32 @llvm.xcore.sext(i32 %a, i32 %b)
56 ; CHECK: sext r0, 4
57 %result = call i32 @llvm.xcore.sext(i32 %a, i32 4)
|
