| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 22 #define EBP 5
|
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 22 #define EBP 5
|
| /prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 22 #define EBP 5
|
| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 22 #define EBP 5
|
| /prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 22 #define EBP 5
|
| /art/compiler/jni/quick/x86/ |
| calling_convention_x86.cc | 116 callee_save_regs_.push_back(X86ManagedRegister::FromCpuRegister(EBP));
122 return 1 << EBP | 1 << ESI | 1 << EDI | 1 << kNumberOfCpuRegisters;
|
| /external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
| x86_xform4.S | 457 PUSH_L( EBP )
507 MOV_L( SRC3, EBP )
513 MOV_L( EBP, DST3 )
524 POP_L( EBP )
543 PUSH_L( EBP )
585 MOV_L( SRC3, EBP )
591 MOV_L( EBP, DST3 )
602 POP_L( EBP )
|
| x86_xform3.S | 580 PUSH_L( EBP )
611 MOV_L( SRC1, EBP )
615 MOV_L( EBP, DST1 )
636 POP_L( EBP )
|
| /external/mesa3d/src/mesa/x86/ |
| x86_xform4.S | 457 PUSH_L( EBP )
507 MOV_L( SRC3, EBP )
513 MOV_L( EBP, DST3 )
524 POP_L( EBP )
543 PUSH_L( EBP )
585 MOV_L( SRC3, EBP )
591 MOV_L( EBP, DST3 )
602 POP_L( EBP )
|
| x86_xform3.S | 580 PUSH_L( EBP )
611 MOV_L( SRC1, EBP )
615 MOV_L( EBP, DST1 )
636 POP_L( EBP )
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCTargetDesc.h | 47 EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
|
| X86MCCodeEmitter.cpp | 426 // If the base is not EBP/ESP and there is no displacement, use simple
428 // encoding for [EBP] with no displacement means [disp32] so we handle it
430 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) {
480 BaseRegNo != N86::EBP) {
486 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
490 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
[all...] |
| /external/qemu/target-i386/ |
| exec.h | 42 #define EBP (env->regs[R_EBP])
303 EBP = env->regs[R_EBP];
331 env->regs[R_EBP] = EBP;
|
| op_helper.c | 386 stl_kernel(env->tr.base + (0x28 + 5 * 4), EBP);
400 stw_kernel(env->tr.base + (0x12 + 5 * 2), EBP);
452 EBP = new_regs[5];
1954 uint32_t esp_mask, esp, ebp; local
1986 target_ulong esp, ebp; local
[all...] |
| /external/chromium_org/tools/traceline/traceline/ |
| assembler.h | 61 EBP = 5,
208 set_modrm(0, EBP);
237 if (disp == 0 && base != EBP) {
267 set_sib(scale, index, EBP);
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 79 FramePtr = X86::EBP;
96 case X86::EBP: case X86::RBP: return 6;
483 // FrameIndex with base register with EBP. Add an offset to the offset.
486 // Now add the frame object offset to the offset from EBP.
536 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
564 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
601 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
637 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
638 return X86::EBP;
673 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP
[all...] |
| X86CodeEmitter.cpp | 525 // If the base is not EBP/ESP and there is no displacement, use simple
527 // encoding for [EBP] with no displacement means [disp32] so we handle it
529 if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) {
562 } else if (DispVal == 0 && BaseRegNo != N86::EBP) {
568 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
[all...] |
| X86FrameLowering.cpp | 351 // pushl %ebp
352 // movl %esp, %ebp
353 // pushl %ebp
357 // The immediate re-push of EBP is unnecessary. At the least, it's an
358 // optimization bug. EBP can be used as a scratch register in certain
373 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
567 // Encode that we are using EBP/RBP as the frame pointer.
749 // Get the offset of the stack slot for the EBP register, which is
754 // Save EBP/RBP into the appropriate stack slot.
760 // Mark the place where EBP/RBP was saved
[all...] |
| /external/lzma/Asm/x86/ |
| 7zAsm.asm | 47 x5 equ EBP
|
| /art/compiler/utils/mips/ |
| assembler_mips.h | 141 if (disp == 0 && base != EBP) {
159 SetSIB(scale, index, EBP);
165 if (disp == 0 && base != EBP) {
181 result.SetModRM(0, EBP);
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 130 ENTRY(EBP) \
148 ENTRY(EBP) \
|
| /art/compiler/utils/x86/ |
| assembler_x86.h | 157 if (disp == 0 && base != EBP) {
175 SetSIB(scale, index, EBP);
181 if (disp == 0 && base != EBP) {
197 result.SetModRM(0, EBP);
|
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 89 GENOFFSET(X86,x86,EBP);
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-x86-linux.c | 376 SC2(ebp,EBP);
658 tst->arch.vex.guest_EBP = sc->ebp;
|
| /external/qemu-pc-bios/bochs/ |
| bochs.h | 59 #undef EBP
|
