/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDGPUISelLowering.h | 36 unsigned Reg, EVT VT) const; 77 bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 80 bool ShouldShrinkFPConstant(EVT VT) const; 95 EVT genIntType(uint32_t size = 32, uint32_t numEle = 1) const;
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R600ISelLowering.h | 38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
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AMDILISelLowering.cpp | 250 AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const 261 AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const 319 EVT OVT = Op.getValueType(); 337 EVT OVT = Op.getValueType(); 356 EVT VT = Op.getValueType(); 425 EVT DVT = Data.getValueType(); 426 EVT BVT = BaseType->getVT(); 433 EVT IVT = genIntType(32, DVT.isVector() ? DVT.getVectorNumElements() : 1); 450 EVT 460 return EVT(MVT::i64) [all...] |
/external/llvm/include/llvm/CodeGen/ |
Analysis.h | 56 SmallVectorImpl<EVT> &ValueVTs,
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SelectionDAGNodes.h | 58 const EVT *VTs; 131 inline EVT getValueType() const; 248 EVT getValueType() const { return Val.getValueType(); } 336 const EVT *ValueList; 355 static const EVT *getValueTypeList(EVT VT); 607 EVT getValueType(unsigned ResNo) const { 624 typedef const EVT* value_iterator; 694 static SDVTList getSDVTList(EVT VT) { 841 inline EVT SDValue::getValueType() const [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16ISelDAGToDAG.h | 27 EVT Ty, bool HasLo, bool HasHi);
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Mips16ISelLowering.h | 24 virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;
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MipsSEISelDAGToDAG.h | 36 EVT Ty, bool HasLo, bool HasHi);
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDGPUISelLowering.h | 36 unsigned Reg, EVT VT) const; 77 bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 80 bool ShouldShrinkFPConstant(EVT VT) const; 95 EVT genIntType(uint32_t size = 32, uint32_t numEle = 1) const;
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R600ISelLowering.h | 38 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
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AMDILISelLowering.cpp | 250 AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const 261 AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const 319 EVT OVT = Op.getValueType(); 337 EVT OVT = Op.getValueType(); 356 EVT VT = Op.getValueType(); 425 EVT DVT = Data.getValueType(); 426 EVT BVT = BaseType->getVT(); 433 EVT IVT = genIntType(32, DVT.isVector() ? DVT.getVectorNumElements() : 1); 450 EVT 460 return EVT(MVT::i64) [all...] |
/frameworks/compile/slang/ |
slang_rs_export_element.cpp | 94 RSExportVectorType *EVT = 102 slangAssert(EI->type == EVT->getType() && "Element has unexpected type"); 103 slangAssert(EI->vsize == EVT->getNumElement() && "Element has unexpected " 105 ET = EVT;
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/external/llvm/lib/Target/X86/ |
X86SelectionDAGInfo.cpp | 56 EVT IntPtr = TLI.getPointerTy(); 83 EVT AVT; 149 EVT CVT = Count.getValueType(); 162 EVT AddrVT = Dst.getValueType(); 163 EVT SizeVT = Size.getValueType(); 254 EVT DstVT = Dst.getValueType(); 255 EVT SrcVT = Src.getValueType(); 256 EVT SizeVT = Size.getValueType();
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/external/llvm/lib/CodeGen/ |
CallingConvLower.cpp | 77 << EVT(ArgVT).getEVTString() << '\n'; 109 << EVT(VT).getEVTString() << '\n'; 127 << EVT(ArgVT).getEVTString() << '\n'; 146 << EVT(ArgVT).getEVTString() << '\n'; 163 << EVT(VT).getEVTString() << '\n'; 176 << EVT(VT).getEVTString() << '\n';
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TargetLoweringBase.cpp | 371 RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) { 387 RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) { 411 RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) { 461 RTLIB::Libcall RTLIB::getFPTOUINT(EVT OpVT, EVT RetVT) { 511 RTLIB::Libcall RTLIB::getSINTTOFP(EVT OpVT, EVT RetVT) [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.h | 126 virtual MVT getScalarShiftAmountTy(EVT LHSTy) const LLVM_OVERRIDE { 129 virtual EVT getSetCCResultType(LLVMContext &, EVT) const LLVM_OVERRIDE { 132 virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const LLVM_OVERRIDE; 133 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const LLVM_OVERRIDE; 136 virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const
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/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 77 SmallVectorImpl<EVT> &ValueVTs, 80 SmallVector<EVT, 16> TempVTs; 85 EVT VT = TempVTs[i]; 332 bool NVPTXTargetLowering::shouldSplitVectorElementType(EVT VT) const { 379 SmallVector<EVT, 16> vtparts; 384 EVT elemtype = vtparts[i]; 430 SmallVector<EVT, 16> vtparts; 534 EVT VT = Outs[OIdx].VT; 540 SmallVector<EVT, 16> vtparts; 556 EVT elemtype = vtparts[j] [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.h | 273 virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const; 285 bool isDesirableToTransformToIntegerOp(unsigned Opc, EVT VT) const; 290 virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const; 292 virtual EVT getOptimalMemOpType(uint64_t Size, 299 virtual bool isZExtFree(SDValue Val, EVT VT2) const; 307 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const; 385 bool isShuffleMaskLegal(const SmallVectorImpl<int> &M, EVT VT) const; 391 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const; 474 virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const { return false; [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAG.cpp | 57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) { 78 bool ConstantFPSDNode::isValueValidForType(EVT VT, 669 EVT VT = cast<VTSDNode>(N)->getVT(); 789 EVT VT = N->getValueType(0); 807 EVT EltVT = N->getValueType(0).getVectorElementType(); 862 unsigned SelectionDAG::getEVTAlignment(EVT VT) const { [all...] |
LegalizeFloatTypes.cpp | 28 static RTLIB::Libcall GetFPLibCall(EVT VT, 142 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 154 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 167 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 183 EVT LVT = LHS.getValueType(); 184 EVT RVT = RHS.getValueType(); 221 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 233 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 246 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)); 258 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0)) [all...] |
LegalizeTypes.cpp | 223 EVT ResultVT = N->getValueType(i); 274 EVT OpVT = N->getOperand(i).getValueType(); [all...] |
LegalizeDAG.cpp | 61 EVT getSetCCResultType(EVT VT) const { 94 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl, 98 void LegalizeSetCCCondCode(EVT VT, SDValue &LHS, SDValue &RHS, SDValue &CC, 102 SDValue ExpandLibCall(RTLIB::Libcall LC, EVT RetVT, const SDValue *Ops, 120 SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT, SDLoc dl); 126 SDValue ExpandLegalINT_TO_FP(bool isSigned, SDValue LegalOp, EVT DestVT, 128 SDValue PromoteLegalINT_TO_FP(SDValue LegalOp, EVT DestVT, bool isSigned [all...] |
DAGCombiner.cpp | 149 SDValue PromoteOperand(SDValue Op, EVT PVT, bool &Replace); 150 SDValue SExtPromoteOperand(SDValue Op, EVT PVT); 151 SDValue ZExtPromoteOperand(SDValue Op, EVT PVT); 259 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, 263 SDValue CombineConsecutiveLoads(SDNode *N, EVT VT); 264 SDValue ConstantFoldBITCASTofBUILD_VECTOR(SDNode *, EVT); 328 EVT getShiftAmountTy(EVT LHSTy) { 337 bool isTypeLegal(const EVT &VT) { 344 EVT getSetCCResultType(EVT VT) const [all...] |
/external/llvm/lib/Target/R600/ |
AMDILISelLowering.cpp | 227 AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { 237 AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const { 292 EVT OVT = Op.getValueType(); 309 EVT OVT = Op.getValueType(); 330 EVT DVT = Data.getValueType(); 331 EVT BVT = BaseType->getVT(); 338 EVT IVT = genIntType(32, DVT.isVector() ? DVT.getVectorNumElements() : 1); 355 EVT 364 return EVT(MVT::i64); 366 return EVT(MVT::getVectorVT(MVT::i64, vEle)) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.h | 346 virtual MVT getScalarShiftAmountTy(EVT LHSTy) const { return MVT::i32; } 349 virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const; 451 /// It returns EVT::Other if the type should be determined using generic 453 virtual EVT 460 virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast = 0) const; 466 virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const; 566 extendArgForPPC64(ISD::ArgFlagsTy Flags, EVT ObjectVT, SelectionDAG &DAG,
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