/external/chromium_org/v8/src/arm/ |
assembler-arm-inl.h | 266 Instr current_instr = Assembler::instr_at(pc_); 267 Instr next_instr = Assembler::instr_at(pc_ + Assembler::kInstrSize); 277 Instr current_instr = Assembler::instr_at(pc_); 383 void Assembler::emit(Instr x) { 385 *reinterpret_cast<Instr*>(pc_) = x; 392 Instr instr = Memory::int32_at(target_pc); local 397 if ((instr & kBxInstMask) == kBxInstPattern) { 399 instr = Memory::int32_at(target_pc); 403 if ((instr & kBlxRegMask) == kBlxRegPattern) 420 Instruction* instr = Instruction::At(pc); local [all...] |
code-stubs-arm.h | 323 Instr first_instruction = Assembler::instr_at(stub->instruction_start()); 324 Instr second_instruction = Assembler::instr_at(stub->instruction_start() +
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macro-assembler-arm.h | 696 static inline bool IsMarkedCode(Instr instr, int type) { 698 return IsNop(instr, type); 702 static inline int GetCodeMarker(Instr instr) { 706 int dst_reg = (instr & dst_mask) >> dst_reg_offset; 707 int src_reg = instr & src_mask; 712 int type = ((instr & non_register_mask) == mov_mask) && [all...] |
ic-arm.cc | 1591 Instr instr = Assembler::instr_at(cmp_instruction_address); local 1602 Instr instr = Assembler::instr_at(cmp_instruction_address); local [all...] |
simulator-arm.h | 265 void Format(Instruction* instr, const char* format); 269 bool ConditionallyExecute(Instruction* instr); 292 int32_t GetShiftRm(Instruction* instr, bool* carry_out); 293 int32_t GetImm(Instruction* instr, bool* carry_out); 294 int32_t ProcessPU(Instruction* instr, 299 void HandleRList(Instruction* instr, bool load); 301 void SoftwareInterrupt(Instruction* instr); 304 inline bool isStopInstruction(Instruction* instr); 318 inline uint16_t ReadHU(int32_t addr, Instruction* instr); 319 inline int16_t ReadH(int32_t addr, Instruction* instr); [all...] |
/external/llvm/lib/MC/ |
MCDwarf.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
LiveIntervalAnalysis.h | 177 /// isNotInMIMap - returns true if the specified machine instr has been 179 bool isNotInMIMap(const MachineInstr* Instr) const { 180 return !Indexes->hasIndex(Instr); 184 SlotIndex getInstructionIndex(const MachineInstr *instr) const { 185 return Indexes->getInstructionIndex(instr);
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/external/llvm/lib/Transforms/Vectorize/ |
LoopVectorize.cpp | 210 void scalarizeInstruction(Instruction *Instr); 213 void vectorizeMemoryInstruction(Instruction *Instr, [all...] |
/external/llvm/include/llvm-c/ |
Core.h | [all...] |
/external/llvm/lib/IR/ |
Core.cpp | [all...] |
/external/llvm/utils/TableGen/ |
CodeGenTarget.cpp | 323 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 324 assert(Instr && "Missing target independent instruction"); 325 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 326 InstrsByEnum.push_back(Instr); 337 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
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InstrInfoEmitter.cpp | 373 const CodeGenInstruction *Instr = NumberedInstructions[i]; 374 InstrNames.add(Instr->TheDef->getName()); 386 const CodeGenInstruction *Instr = NumberedInstructions[i]; 387 OS << InstrNames.get(Instr->TheDef->getName()) << "U, ";
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/external/llvm/tools/llvm-stress/ |
llvm-stress.cpp | 669 Instruction *Instr = *it; 670 BasicBlock *Curr = Instr->getParent(); 671 BasicBlock::iterator Loc= Instr; 673 Instr->moveBefore(Curr->getTerminator()); 675 BranchInst::Create(Curr, Next, Instr, Curr->getTerminator());
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/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.cpp | [all...] |
/external/llvm/lib/Transforms/InstCombine/ |
InstCombineAddSub.cpp | 157 FAddCombine(InstCombiner::BuilderTy *B) : Builder(B), Instr(0) {} 181 Instruction *Instr; 459 // Input Instr I Factor AddSub0 AddSub1 513 Instr = I; 674 Result = ConstantFP::get(Instr->getType(), 0.0); 775 NewInstr->setDebugLoc(Instr->getDebugLoc()); 781 NewInstr->setFastMathFlags(Instr->getFastMathFlags()); 829 return Coeff.getValue(Instr->getType()); 845 return createFMul(OpndVal, Coeff.getValue(Instr->getType())); [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
/external/chromium_org/v8/src/mips/ |
code-stubs-mips.h | 338 Instr first_instruction = Assembler::instr_at(stub->instruction_start()); 339 Instr second_instruction = Assembler::instr_at(stub->instruction_start() +
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simulator-mips.h | 255 void Format(Instruction* instr, const char* format); 263 inline uint16_t ReadHU(int32_t addr, Instruction* instr); 264 inline int16_t ReadH(int32_t addr, Instruction* instr); 266 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); 267 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); 269 inline int ReadW(int32_t addr, Instruction* instr); 270 inline void WriteW(int32_t addr, int value, Instruction* instr); 272 inline double ReadD(int32_t addr, Instruction* instr); 273 inline void WriteD(int32_t addr, double value, Instruction* instr); 284 void DecodeTypeRegister(Instruction* instr); [all...] |
macro-assembler-mips.h | 450 static inline bool IsMarkedCode(Instr instr, int type) { 452 return IsNop(instr, type); 456 static inline int GetCodeMarker(Instr instr) { 457 uint32_t opcode = ((instr & kOpcodeMask)); 458 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift); 459 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift); 460 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift); 558 #define DEFINE_INSTRUCTION(instr) \ [all...] |
ic-mips.cc | 1598 Instr instr = Assembler::instr_at(andi_instruction_address); local 1610 Instr instr = Assembler::instr_at(andi_instruction_address); local [all...] |
/external/v8/src/arm/ |
simulator-arm.h | 231 void Format(Instruction* instr, const char* format); 235 bool ConditionallyExecute(Instruction* instr); 257 int32_t GetShiftRm(Instruction* instr, bool* carry_out); 258 int32_t GetImm(Instruction* instr, bool* carry_out); 259 void ProcessPUW(Instruction* instr, 264 void HandleRList(Instruction* instr, bool load); 266 void SoftwareInterrupt(Instruction* instr); 269 inline bool isStopInstruction(Instruction* instr); 283 inline uint16_t ReadHU(int32_t addr, Instruction* instr); 284 inline int16_t ReadH(int32_t addr, Instruction* instr); [all...] |
macro-assembler-arm.h | 627 static inline bool IsMarkedCode(Instr instr, int type) { 629 return IsNop(instr, type); 633 static inline int GetCodeMarker(Instr instr) { 637 int dst_reg = (instr & dst_mask) >> dst_reg_offset; 638 int src_reg = instr & src_mask; 643 int type = ((instr & non_register_mask) == mov_mask) && [all...] |
/external/v8/src/mips/ |
simulator-mips.h | 251 void Format(Instruction* instr, const char* format); 259 inline uint16_t ReadHU(int32_t addr, Instruction* instr); 260 inline int16_t ReadH(int32_t addr, Instruction* instr); 262 inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); 263 inline void WriteH(int32_t addr, int16_t value, Instruction* instr); 265 inline int ReadW(int32_t addr, Instruction* instr); 266 inline void WriteW(int32_t addr, int value, Instruction* instr); 268 inline double ReadD(int32_t addr, Instruction* instr); 269 inline void WriteD(int32_t addr, double value, Instruction* instr); 280 void DecodeTypeRegister(Instruction* instr); [all...] |
macro-assembler-mips.h | 443 static inline bool IsMarkedCode(Instr instr, int type) { 445 return IsNop(instr, type); 449 static inline int GetCodeMarker(Instr instr) { 450 uint32_t opcode = ((instr & kOpcodeMask)); 451 uint32_t rt = ((instr & kRtFieldMask) >> kRtShift); 452 uint32_t rs = ((instr & kRsFieldMask) >> kRsShift); 453 uint32_t sa = ((instr & kSaFieldMask) >> kSaShift); 549 #define DEFINE_INSTRUCTION(instr) \ [all...] |
/external/llvm/lib/Analysis/IPA/ |
InlineCost.cpp | [all...] |