| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIRegisterInfo.cpp | 27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const
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| SIInstrInfo.cpp | 52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg,
55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
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| AMDGPUInstrInfo.cpp | 141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,
241 MachineRegisterInfo &MRI = MF.getRegInfo();
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| AMDGPUInstrInfo.h | 90 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF,
94 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF,
101 bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
134 virtual MachineInstr* getMovImmInstr(MachineFunction *MF, unsigned DstReg,
141 virtual void convertToISA(MachineInstr & MI, MachineFunction &MF,
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| /external/llvm/include/llvm/CodeGen/ |
| VirtRegMap.h | 44 MachineFunction *MF;
73 virtual bool runOnMachineFunction(MachineFunction &MF);
81 assert(MF && "getMachineFunction called before runOnMachineFunction");
82 return *MF;
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| RegisterClassInfo.h | 52 const MachineFunction *MF;
55 // Callee saved registers of last MF. Assumed to be valid until the next
62 // Reserved registers in the current MF.
81 /// runOnFunction - Prepare to answer questions about MF. This must be called
83 void runOnMachineFunction(const MachineFunction &MF);
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| /external/llvm/include/llvm/Target/ |
| TargetSubtargetInfo.h | 79 virtual void resetSubtargetFeatures(const MachineFunction *MF) { }
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| /external/llvm/lib/CodeGen/ |
| BranchFolding.h | 28 bool OptimizeFunction(MachineFunction &MF,
95 bool TailMergeBlocks(MachineFunction &MF);
115 bool OptimizeBranches(MachineFunction &MF);
120 bool HoistCommonCode(MachineFunction &MF);
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| PHIElimination.cpp | 67 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
80 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB,
126 bool PHIElimination::runOnMachineFunction(MachineFunction &MF) {
127 MRI = &MF.getRegInfo();
140 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
141 Changed |= SplitPHIEdges(MF, *I, MLI);
145 analyzePHINodes(MF);
148 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I
[all...] |
| TargetInstrInfo.cpp | 41 const MachineFunction &MF) const {
47 return TRI->getPointerRegClass(MF, RegClass);
159 MachineFunction &MF = *MI->getParent()->getParent();
160 MI = MF.CloneMachineInstr(MI);
298 MachineFunction &MF) const {
301 return MF.CloneMachineInstr(Orig);
363 MachineFunction &MF = *MBB->getParent();
366 if (MachineInstr *NewMI = foldMemoryOperandImpl(MF, MI, Ops, FI)) {
374 const MachineFrameInfo &MFI = *MF.getFrameInfo();
377 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI)
[all...] |
| LiveStackAnalysis.cpp | 50 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) {
51 TRI = MF.getTarget().getRegisterInfo();
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| TailDuplication.cpp | 81 virtual bool runOnMachineFunction(MachineFunction &MF);
95 MachineFunction &MF,
101 bool TailDuplicateBlocks(MachineFunction &MF);
102 bool shouldTailDuplicate(const MachineFunction &MF,
112 MachineFunction &MF,
117 MachineFunction &MF);
130 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
131 TII = MF.getTarget().getInstrInfo();
132 TRI = MF.getTarget().getRegisterInfo();
133 MRI = &MF.getRegInfo()
[all...] |
| TargetRegisterInfo.cpp | 122 static void getAllocatableSetForRC(const MachineFunction &MF,
125 ArrayRef<uint16_t> Order = RC->getRawAllocationOrder(MF);
130 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
137 getAllocatableSetForRC(MF, SubClass, Allocatable);
142 getAllocatableSetForRC(MF, *I, Allocatable);
146 BitVector Reserved = getReservedRegs(MF);
259 const MachineFunction &MF,
261 const MachineRegisterInfo &MRI = MF.getRegInfo();
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| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 48 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
49 bool Ret = SelectionDAGISel::runOnMachineFunction(MF);
51 processFunctionAfterISel(MF);
59 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg();
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| MipsSEISelDAGToDAG.cpp | 38 bool MipsSEDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) {
41 return MipsDAGToDAGISel::runOnMachineFunction(MF);
45 MachineFunction &MF) {
46 MachineInstrBuilder MIB(MF, &MI);
107 void MipsSEDAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) {
108 MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
113 MachineBasicBlock &MBB = MF.front();
115 MachineRegisterInfo &RegInfo = MF.getRegInfo();
116 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
130 MF.getRegInfo().addLiveIn(Mips::T9_64)
[all...] |
| MipsISelDAGToDAG.h | 42 virtual bool runOnMachineFunction(MachineFunction &MF);
80 virtual void processFunctionAfterISel(MachineFunction &MF) = 0;
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| /external/llvm/lib/Target/Sparc/ |
| SparcMachineFunctionInfo.h | 38 explicit SparcMachineFunctionInfo(MachineFunction &MF)
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 36 virtual bool runOnMachineFunction(MachineFunction &MF);
51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
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| SIInstrInfo.h | 45 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
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| SIRegisterInfo.cpp | 27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const
|
| SIInstrInfo.cpp | 52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg,
55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
|
| AMDGPUInstrInfo.cpp | 141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,
241 MachineRegisterInfo &MRI = MF.getRegInfo();
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| /external/llvm/lib/Target/R600/ |
| SIRegisterInfo.cpp | 26 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
32 MachineFunction &MF) const {
|
| AMDGPUInstrInfo.cpp | 122 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
130 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
144 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
227 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF,
229 MachineRegisterInfo &MRI = MF.getRegInfo();
|
| /external/llvm/lib/Target/X86/ |
| X86PadShortFunction.cpp | 54 virtual bool runOnMachineFunction(MachineFunction &MF);
93 bool PadShortFunc::runOnMachineFunction(MachineFunction &MF) {
94 const AttributeSet &FnAttrs = MF.getFunction()->getAttributes();
102 TM = &MF.getTarget();
108 findReturns(MF.begin());
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