| /external/llvm/lib/Target/Mips/ |
| Mips16FrameLowering.cpp | 30 void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
31 MachineBasicBlock &MBB = MF.front();
32 MachineFrameInfo *MFI = MF.getFrameInfo();
34 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
42 MachineModuleInfo &MMI = MF.getMMI();
71 if (hasFP(MF))
77 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
80 MachineFrameInfo *MFI = MF.getFrameInfo();
82 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
89 if (hasFP(MF))
[all...] |
| MipsMachineFunction.cpp | 34 const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
43 return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
56 return Mips16SPAliasReg = MF.getRegInfo().createVirtualRegister(RC);
61 const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
65 EhDataRegFI[I] = MF.getFrameInfo()->CreateStackObject(RC->getSize(),
|
| MipsRegisterInfo.cpp | 53 MachineFunction &MF) const {
60 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
61 return 28 - TFI->hasFP(MF);
78 getCalleeSavedRegs(const MachineFunction *MF) const {
108 getReservedRegs(const MachineFunction &MF) const {
138 if (MF.getTarget().getFrameLowering()->hasFP(MF)) {
176 MipsRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const {
181 MipsRegisterInfo::trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
192 MachineFunction &MF = *MI.getParent()->getParent()
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIAssignInterpRegs.cpp | 38 void AddLiveIn(MachineFunction * MF, MachineRegisterInfo & MRI,
45 virtual bool runOnMachineFunction(MachineFunction &MF);
67 bool SIAssignInterpRegsPass::runOnMachineFunction(MachineFunction &MF)
89 SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
90 MachineRegisterInfo &MRI = MF.getRegInfo();
115 AddLiveIn(&MF, MRI, new_reg, virt_reg);
122 void SIAssignInterpRegsPass::AddLiveIn(MachineFunction * MF,
129 MF->front().addLiveIn(physReg);
130 BuildMI(MF->front(), MF->front().begin(), DebugLoc()
[all...] |
| AMDGPUAsmPrinter.cpp | 40 bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
43 MF.dump();
45 SetupMachineFunction(MF);
47 EmitProgramInfo(MF);
54 void AMDGPUAsmPrinter::EmitProgramInfo(MachineFunction &MF) {
61 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
124 SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIAssignInterpRegs.cpp | 38 void AddLiveIn(MachineFunction * MF, MachineRegisterInfo & MRI,
45 virtual bool runOnMachineFunction(MachineFunction &MF);
67 bool SIAssignInterpRegsPass::runOnMachineFunction(MachineFunction &MF)
89 SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
90 MachineRegisterInfo &MRI = MF.getRegInfo();
115 AddLiveIn(&MF, MRI, new_reg, virt_reg);
122 void SIAssignInterpRegsPass::AddLiveIn(MachineFunction * MF,
129 MF->front().addLiveIn(physReg);
130 BuildMI(MF->front(), MF->front().begin(), DebugLoc()
[all...] |
| AMDGPUAsmPrinter.cpp | 40 bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
43 MF.dump();
45 SetupMachineFunction(MF);
47 EmitProgramInfo(MF);
54 void AMDGPUAsmPrinter::EmitProgramInfo(MachineFunction &MF) {
61 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
124 SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
|
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 85 bool XCoreFrameLowering::hasFP(const MachineFunction &MF) const {
86 return MF.getTarget().Options.DisableFramePointerElim(MF) ||
87 MF.getFrameInfo()->hasVarSizedObjects();
90 void XCoreFrameLowering::emitPrologue(MachineFunction &MF) const {
91 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
93 MachineFrameInfo *MFI = MF.getFrameInfo();
94 MachineModuleInfo *MMI = &MF.getMMI();
96 *static_cast<const XCoreInstrInfo*>(MF.getTarget().getInstrInfo());
97 XCoreFunctionInfo *XFI = MF.getInfo<XCoreFunctionInfo>()
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFixupHwLoops.cpp | 43 virtual bool runOnMachineFunction(MachineFunction &MF);
60 bool fixupLoopInstrs(MachineFunction &MF);
63 void convertLoopInstr(MachineFunction &MF,
87 bool HexagonFixupHwLoops::runOnMachineFunction(MachineFunction &MF) {
88 bool Changed = fixupLoopInstrs(MF);
101 bool HexagonFixupHwLoops::fixupLoopInstrs(MachineFunction &MF) {
109 for (MachineFunction::iterator MBB = MF.begin(), MBBe = MF.end();
122 for (MachineFunction::iterator MBB = MF.begin(), MBBe = MF.end()
[all...] |
| HexagonFrameLowering.cpp | 46 void HexagonFrameLowering::determineFrameLayout(MachineFunction &MF) const {
47 MachineFrameInfo *MFI = MF.getFrameInfo();
53 unsigned TargetAlign = MF.getTarget().getFrameLowering()->getStackAlignment();
76 void HexagonFrameLowering::emitPrologue(MachineFunction &MF) const {
77 MachineBasicBlock &MBB = MF.front();
78 MachineFrameInfo *MFI = MF.getFrameInfo();
81 static_cast<const HexagonRegisterInfo *>(MF.getTarget().getRegisterInfo());
83 determineFrameLayout(MF);
96 MF.getInfo<HexagonMachineFunctionInfo>();
114 if (hasFP(MF)) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 23 bool Thumb1FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const{
24 const MachineFrameInfo *FFI = MF.getFrameInfo();
33 return !MF.getFrameInfo()->hasVarSizedObjects();
48 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
51 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
53 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
54 if (!hasReservedCallFrame(MF)) {
81 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
82 MachineBasicBlock &MBB = MF.front();
84 MachineFrameInfo *MFI = MF.getFrameInfo()
[all...] |
| Thumb2RegisterInfo.cpp | 41 MachineFunction &MF = *MBB.getParent();
42 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
43 MachineConstantPool *ConstantPool = MF.getConstantPool();
|
| /external/llvm/lib/CodeGen/ |
| ExpandISelPseudos.cpp | 33 virtual bool runOnMachineFunction(MachineFunction &MF);
46 bool ExpandISelPseudos::runOnMachineFunction(MachineFunction &MF) {
48 const TargetLowering *TLI = MF.getTarget().getTargetLowering();
51 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
|
| AllocationOrder.cpp | 33 const MachineFunction &MF = VRM.getMachineFunction();
35 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
36 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 47 void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
49 MF.getInfo<AArch64MachineFunctionInfo>();
50 MachineBasicBlock &MBB = MF.front();
52 MachineFrameInfo *MFI = MF.getFrameInfo();
53 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
56 MachineModuleInfo &MMI = MF.getMMI();
59 || MF.getFunction()->needsUnwindTableEntry();
108 bool FPNeedsSetting = hasFP(MF);
162 if (!hasFP(MF) && NumResidualBytes) {
193 AArch64FrameLowering::emitEpilogue(MachineFunction &MF,
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrBuilder.h | 29 MachineFunction &MF = *MI->getParent()->getParent();
30 MachineFrameInfo *MFFrame = MF.getFrameInfo();
39 MF.getMachineMemOperand(MachinePointerInfo(
|
| SystemZRegisterInfo.cpp | 24 SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
38 SystemZRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
40 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
42 if (TFI->hasFP(MF)) {
63 MachineFunction &MF = *MBB.getParent();
66 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
71 unsigned BasePtr = getFrameRegister(MF);
72 int64_t Offset = (TFI->getFrameIndexOffset(MF, FrameIndex) +
101 MF.getRegInfo().createVirtualRegister(&SystemZ::ADDR64BitRegClass);
136 SystemZRegisterInfo::getFrameRegister(const MachineFunction &MF) const
[all...] |
| SystemZFrameLowering.cpp | 65 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
67 MachineFrameInfo *MFFrame = MF.getFrameInfo();
68 MachineRegisterInfo &MRI = MF.getRegInfo();
69 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
70 bool HasFP = hasFP(MF);
71 SystemZMachineFunctionInfo *MFI = MF.getInfo<SystemZMachineFunctionInfo>();
72 bool IsVarArg = MF.getFunction()->isVarArg();
96 const uint16_t *CSRegs = TRI->getCalleeSavedRegs(&MF);
131 MachineFunction &MF = *MBB.getParent();
132 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo()
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86VZeroUpper.cpp | 37 virtual bool runOnMachineFunction(MachineFunction &MF);
39 bool processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
153 bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) {
154 TII = MF.getTarget().getInstrInfo();
155 MachineRegisterInfo &MRI = MF.getRegInfo();
177 BBState.resize(MF.getNumBlockIDs(), 0);
178 BBSolved.resize(MF.getNumBlockIDs(), 0);
187 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
188 MadeChange |= processBasicBlock(MF, *I)
[all...] |
| X86FrameLowering.cpp | 38 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
39 return !MF.getFrameInfo()->hasVarSizedObjects();
45 bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
46 const MachineFrameInfo *MFI = MF.getFrameInfo();
47 const MachineModuleInfo &MMI = MF.getMMI();
50 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
51 RegInfo->needsStackRealignment(MF) ||
53 MFI->isFrameAddressTaken() || MF.hasMSInlineAsm() ||
54 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() |
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.cpp | 82 NVPTXRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
89 NVPTXRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
94 BitVector NVPTXRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
107 MachineFunction &MF = *MI.getParent()->getParent();
108 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
120 unsigned NVPTXRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
|
| /external/llvm/lib/Target/R600/ |
| SIFixSGPRCopies.cpp | 89 virtual bool runOnMachineFunction(MachineFunction &MF);
131 bool SIFixSGPRCopies::runOnMachineFunction(MachineFunction &MF) {
132 MachineRegisterInfo &MRI = MF.getRegInfo();
133 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
134 for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
|
| /external/llvm/include/llvm/CodeGen/ |
| EdgeBundles.h | 27 const MachineFunction *MF;
52 const MachineFunction *getMachineFunction() const { return MF; }
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.cpp | 41 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
42 const TargetFrameLowering *TFI = MF->getTarget().getFrameLowering();
43 const Function* F = MF->getFunction();
67 if (TFI->hasFP(*MF))
76 BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
78 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
91 if (TFI->hasFP(MF))
98 MSP430RegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind)
111 MachineFunction &MF = *MBB.getParent();
112 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering()
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 49 MachineFunction *MF = Entry->getParent();
60 for (MachineFunction::iterator I = MF->begin(), E = MF->end(); I != E; ++I) {
94 MachineFunction *MF = MI->getParent()->getParent();
95 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
100 if (MF->getRegInfo().isPhysRegUsed(VRRegNo[i]))
106 I = MF->getRegInfo().livein_begin(),
107 E = MF->getRegInfo().livein_end(); I != E; ++I) {
114 for (MachineFunction::const_iterator BI = MF->begin(), BE = MF->end()
[all...] |
