| /external/valgrind/main/none/tests/ |
| sha1_test.c | 92 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
94 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30);
131 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
|
| /external/wpa_supplicant_8/src/crypto/ |
| sha1-internal.c | 138 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
142 #define R1(v,w,x,y,z,i) \
197 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
|
| /external/clang/lib/ARCMigrate/ |
| TransformActions.cpp | 47 SourceRange R1, R2;
212 if (!canRemoveRange(act.R1))
221 if (!canReplaceRange(act.R1, act.R2))
254 commitRemove(act.R1);
260 commitReplace(act.R1, act.R2);
266 commitIncreaseIndentation(act.R1, act.Loc);
269 commitClearDiagnostic(act.DiagIDs, act.R1);
309 data.R1 = range;
333 data.R1 = range;
363 data.R1 = range
[all...] |
| /external/libvpx/libvpx/vp8/common/ppc/ |
| idctllm_altivec.asm | 14 .macro load_c V, LABEL, OFF, R0, R1
16 la \R1, \LABEL@l(\R0)
17 lvx \V, \OFF, \R1
135 stwu r1,-416(r1) ;# create space on the stack
137 stvx v0, 0, r1
138 lwz r6, 0(r1)
140 lwz r6, 4(r1)
145 lwz r6, 8(r1)
147 lwz r6, 12(r1)
[all...] |
| /art/runtime/arch/arm/ |
| context_arm.cc | 82 gprs_[R1] = const_cast<uint32_t*>(&gZero);
|
| /external/checkpolicy/ |
| policy_scan.l | 198 r1 |
199 R1 { return(R1); }
|
| /external/chromium_org/third_party/openssl/openssl/crypto/md5/ |
| md5_locl.h | 117 #define R1(a,b,c,d,k,s,t) { \
|
| /external/clang/include/clang/Tooling/ |
| Refactoring.h | 122 bool operator()(const Replacement &R1, const Replacement &R2) const;
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.h | 41 case R0: case R1: case R2: case R3:
|
| /external/openssl/crypto/md5/ |
| md5_locl.h | 117 #define R1(a,b,c,d,k,s,t) { \
|
| /external/clang/lib/AST/ |
| Expr.cpp | [all...] |
| /art/compiler/utils/arm/ |
| managed_register_arm.h | 117 if (reg_low == R1) {
207 if (r_low != R1) { // not the dalvik special case
|
| /libcore/luni/src/test/java/libcore/java/lang/ |
| ClassCastExceptionTest.java | 158 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1,
163 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1,
|
| /dalvik/libdex/ |
| sha1.cpp | 125 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
127 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30);
163 R0(a,b,c,d,e,15); R1(e,a,b,c,d,16); R1(d,e,a,b,c,17);
164 R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); R2(a,b,c,d,e,20);
|
| /external/chromium_org/third_party/smhasher/src/ |
| sha1.cpp | 106 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
108 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30);
138 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
|
| /frameworks/compile/libbcc/lib/Support/ |
| sha1.c | 124 /* (R0+R1), R2, R3, R4 are the different operations used in SHA1 */
126 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30);
162 R0(a,b,c,d,e,15); R1(e,a,b,c,d,16); R1(d,e,a,b,c,17);
163 R1(c,d,e,a,b,18); R1(b,c,d,e,a,19); R2(a,b,c,d,e,20);
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCTargetDesc.cpp | 73 // Initial state of the frame pointer is R1.
74 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Deemph_32_opt.s | 27 @x_lo RN R1
39 LDRSH r7, [r1], #2 @load x_lo[0]
52 LDRSH r7, [r1], #2 @load x_lo[1]
70 LDRSH r7, [r1], #2
80 LDRSH r7, [r1], #2
|
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Deemph_32_neon.s | 27 @x_lo RN R1
39 LDRSH r7, [r1], #2 @load x_lo[0]
52 LDRSH r7, [r1], #2 @load x_lo[1]
70 LDRSH r7, [r1], #2
80 LDRSH r7, [r1], #2
|
| /external/llvm/include/llvm/MC/ |
| MCDwarf.h | 299 MCCFIInstruction(OpType Op, MCSymbol *L, unsigned R1, unsigned R2) :
300 Operation(Op), Label(L), Register(R1), Register2(R2) {
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-arm-linux.c | 139 SC2(r1,R1);
318 REST(r1,R1);
|
| /bionic/libc/upstream-netbsd/common/lib/libc/hash/sha1/ |
| sha1.c | 65 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1
68 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30);
101 #define nR1(v,w,x,y,z,i) R1(*v,*w,*x,*y,*z,i)
187 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
|
| /external/libvpx/libvpx/vp8/encoder/ppc/ |
| fdct_altivec.asm | 15 .macro load_c V, LABEL, OFF, R0, R1
17 la \R1, \LABEL@l(\R0)
18 lvx \V, \OFF, \R1
32 stwu r1,-32(r1) ;# create space on the stack
49 addi r1, r1, 32 ;# recover stack
116 addi r8, r1, 0
145 addi r8, r1, 0
168 addi r8, r1,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 165 Reserved.set(PPC::R1);
296 .addReg(PPC::R1);
347 BuildMI(MBB, II, dl, TII.get(PPC::STWUX), PPC::R1)
349 .addReg(PPC::R1)
352 .addReg(PPC::R1)
615 // Now add the frame object offset to the offset from r1.
687 return TFI->hasFP(MF) ? PPC::R31 : PPC::R1;
|
| /system/extras/ext4_utils/ |
| sha1.c | 51 * (R0+R1), R2, R3, R4 are the different operations (rounds) used in SHA1
54 #define R1(v,w,x,y,z,i) z+=((w&(x^y))^y)+blk(i)+0x5A827999+rol(v,5);w=rol(w,30);
77 #define nR1(v,w,x,y,z,i) R1(*v,*w,*x,*y,*z,i)
165 R1(e,a,b,c,d,16); R1(d,e,a,b,c,17); R1(c,d,e,a,b,18); R1(b,c,d,e,a,19);
|
