| /external/llvm/test/MC/ARM/ |
| neon-bitwise-encoding.s | 22 vorr.i32 d16, #0x1000000
23 vorr.i32 q8, #0x1000000
24 vorr.i32 q8, #0x0
26 @ CHECK: vorr.i32 d16, #0x1000000 @ encoding: [0x11,0x07,0xc0,0xf2]
27 @ CHECK: vorr.i32 q8, #0x1000000 @ encoding: [0x51,0x07,0xc0,0xf2]
28 @ CHECK: vorr.i32 q8, #0x0 @ encoding: [0x50,0x01,0xc0,0xf2]
32 vbic.i32 d16, #0xFF000000
33 vbic.i32 q8, #0xFF000000
39 @ CHECK: vbic.i32 d16, #0xff000000 @ encoding: [0x3f,0x07,0xc7,0xf3]
40 @ CHECK: vbic.i32 q8, #0xff000000 @ encoding: [0x7f,0x07,0xc7,0xf3
[all...] |
| neont2-mul-encoding.s | 7 vmul.i32 d16, d16, d17
11 vmul.i32 q8, q8, q9
19 @ CHECK: vmul.i32 d16, d16, d17 @ encoding: [0x60,0xef,0xb1,0x09]
23 @ CHECK: vmul.i32 q8, q8, q9 @ encoding: [0x60,0xef,0xf2,0x09]
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.cpp | 122 addRegisterClass(MVT::i32, &Mips::GPR32RegClass);
128 addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);
134 setOperationAction(ISD::ATOMIC_CMP_SWAP, MVT::i32, Expand);
135 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand);
136 setOperationAction(ISD::ATOMIC_LOAD_ADD, MVT::i32, Expand);
137 setOperationAction(ISD::ATOMIC_LOAD_SUB, MVT::i32, Expand);
138 setOperationAction(ISD::ATOMIC_LOAD_AND, MVT::i32, Expand);
139 setOperationAction(ISD::ATOMIC_LOAD_OR, MVT::i32, Expand);
140 setOperationAction(ISD::ATOMIC_LOAD_XOR, MVT::i32, Expand);
141 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 240 MVT::i32, AM.Disp,
243 Disp = CurDAG->getTargetConstantPool(AM.CP, MVT::i32,
247 Disp = CurDAG->getTargetExternalSymbol(AM.ES, MVT::i32, AM.SymbolFlags);
250 Disp = CurDAG->getTargetJumpTable(AM.JT, MVT::i32, AM.SymbolFlags);
252 Disp = CurDAG->getTargetBlockAddress(AM.BlockAddr, MVT::i32, AM.Disp,
255 Disp = CurDAG->getTargetConstant(AM.Disp, MVT::i32);
260 Segment = CurDAG->getRegister(0, MVT::i32);
270 /// i32.
272 return CurDAG->getTargetConstant(Imm, MVT::i32);
[all...] |
| /external/clang/test/Parser/ |
| altivec.c | 81 typedef int i32; typedef
83 // i8, i16, i32 here are field names, not type names.
86 vector long i32; // expected-warning {{deprecated}} member in struct:S
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonVarargsCallingConvention.h | 48 if (LocVT == MVT::i32 ||
106 if (LocVT == MVT::i32 ||
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 141 virtual MVT getScalarShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
149 EVT = MVT::i32) const;
|
| NVPTXISelDAGToDAG.h | 72 return CurDAG->getTargetConstant(Imm, MVT::i32);
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 54 setOperationAction(ISD::ROTL, MVT::i32, Expand);
59 AddPromotedToType(ISD::STORE, MVT::f32, MVT::i32);
71 AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32);
90 setOperationAction(ISD::UDIV, MVT::i32, Expand);
91 setOperationAction(ISD::UDIVREM, MVT::i32, Custom);
92 setOperationAction(ISD::UREM, MVT::i32, Expand);
129 return MVT::i32;
208 return DAG.getConstant(Offset, TD->getPointerSize() == 8 ? MVT::i64 : MVT::i32);
|
| SIISelLowering.cpp | 44 addRegisterClass(MVT::i32, &AMDGPU::VSrc_32RegClass);
71 setOperationAction(ISD::ADD, MVT::i32, Legal);
74 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
86 setLoadExtAction(ISD::SEXTLOAD, MVT::i32, Expand);
105 return VT.bitsGT(MVT::i32);
335 return MVT::i32;
526 SDValue Hi = DAG.getNode(ISD::SRA, DL, MVT::i32, Op.getOperand(0),
527 DAG.getConstant(31, MVT::i32));
542 DAG.getConstant(0, MVT::i32));
764 SDValue RC = DAG.getTargetConstant(RegClass, MVT::i32);
[all...] |
| /frameworks/av/media/mtp/ |
| MtpProperty.cpp | 82 mDefaultValue.u.i32 = defaultValue;
250 mMinimumValue.u.i32 = min;
251 mMaximumValue.u.i32 = max;
252 mStepSize.u.i32 = step;
297 mEnumValues[i].u.i32 = value;
382 buffer.appendFormat("%d", value.u.i32);
432 value.u.i32 = packet.getInt32();
485 packet.putInt32(value.u.i32);
|
| /frameworks/av/services/camera/libcameraservice/common/ |
| FrameProcessorBase.cpp | 116 ATRACE_INT("cam2_frame", entry.data.i32[0]);
164 int32_t requestId = entry.data.i32[0];
|
| /system/media/camera/include/system/ |
| camera_metadata.h | 87 int32_t *i32; member in union:camera_metadata_entry::__anon62869
106 const int32_t *i32; member in union:camera_metadata_ro_entry::__anon62870
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/ |
| h264bsd_intra_prediction.c | 184 void h264bsdAddResidual(u8 *data, i32 *residual, u32 blockNum);
238 (i32)width,
242 (i32)(availableB + (availableA<<1) +
349 (i32)width,
352 (i32)(availableB +
409 (i32)width,
413 (i32)(availableB +
427 (i32)width,
431 (i32)(availableB +
622 u32 h264bsdIntra16x16Prediction(mbStorage_t *pMb, u8 *data, i32 residual[][16]
[all...] |
| /external/chromium/base/win/ |
| scoped_variant.h | 98 void Set(int32 i32);
|
| /external/chromium_org/base/win/ |
| scoped_variant.h | 97 void Set(int32 i32);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIGenRegisterInfo.pl | 142 def SReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
146 def VReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
167 def AllReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
174 def M0Reg : RegisterClass<"AMDGPU", [i32], 32, (add M0)>;
|
| /external/llvm/include/llvm/Support/ |
| DataTypes.h | 159 # define INT32_C(C) C##i32
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIGenRegisterInfo.pl | 142 def SReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
146 def VReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
167 def AllReg_32 : RegisterClass<"AMDGPU", [f32, i32], 32,
174 def M0Reg : RegisterClass<"AMDGPU", [i32], 32, (add M0)>;
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_TransformDequantChromaDCFromPair_s.S | 50 vshrn.i32 d2, q1, #1
|
| /external/chromium_org/third_party/icu/source/test/intltest/ |
| winnmtst.cpp | 235 int32_t i32 = randomInt32(); local
240 getWindowsFormat(lcid, currency, w3Buffer, L"%I32d", i32);
252 wnf->format(i32, u3Buffer);
|
| /external/icu4c/test/intltest/ |
| winnmtst.cpp | 235 int32_t i32 = randomInt32(); local
240 getWindowsFormat(lcid, currency, w3Buffer, L"%I32d", i32);
252 wnf->format(i32, u3Buffer);
|
| /external/qemu/ |
| qemu-timer.h | 253 } i32;
256 : "=r"(rval.i32.high), "=r"(rval.i32.low));
|
| /external/icu4c/test/iotest/ |
| iotest.cpp | 213 int32_t i32; local
273 i32 = (int32_t)uto64(argument);
274 uBufferLenReturned = u_sprintf_u(uBuffer, format, i32);
275 uFileBufferLenReturned = u_fprintf_u(testFile.getAlias(), format, i32);
378 int32_t i32, expected32; local
460 uBufferLenReturned = u_sscanf_u(argument, format, &i32);
461 //uFileBufferLenReturned = u_fscanf_u(testFile, format, i32);
462 if (i32 != expected32) {
464 i, i32, expected32);
582 int32_t i32; local
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 543 // Truncate values from i64 to i32, for shifts.
544 assert(VT == MVT::i32 && Base.getValueType() == MVT::i64 &&
785 if (N.getValueType() == MVT::i32 && VT == MVT::i64) {
791 if (N.getValueType() == MVT::i64 && VT == MVT::i32) {
818 if (VT == MVT::i32 ||
837 CurDAG->getTargetConstant(RISBG.Start, MVT::i32),
838 CurDAG->getTargetConstant(RISBG.End | 128, MVT::i32),
839 CurDAG->getTargetConstant(RISBG.Rotate, MVT::i32)
880 CurDAG->getTargetConstant(RxSBG[I].Start, MVT::i32),
881 CurDAG->getTargetConstant(RxSBG[I].End, MVT::i32),
[all...] |
