| /external/valgrind/main/VEX/priv/ |
| ir_opt.c | [all...] |
| host_amd64_defs.c | 1994 Int i32 = (Int)w32; local
[all...] |
| host_x86_defs.c | 1887 Int i32 = (Int)w32; local
[all...] |
| ir_defs.c | 54 case Ity_I32: vex_printf( "I32"); break;
72 union { ULong i64; Double f64; UInt i32; Float f32; } u; member in union:__anon29346
78 case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break;
81 vex_printf( "F32{0x%x}", u.i32);
[all...] |
| /external/chromium_org/tools/win/split_link/viz.js/ |
| viz.js | 161 if (/<?{ ?[^}]* ?}>?/.test(type)) return true; // { i32, i8 } etc. - anonymous struct types
165 INT_TYPES: {"i1":0,"i8":0,"i16":0,"i32":0,"i64":0},
188 '%i32': 4,
509 // getValue need LLVM types ('i8', 'i32') - this is a lower-level operation
512 if (type.charAt(type.length-1) === '*') type = 'i32'; // pointers are 32-bit
517 case 'i32': HEAP32[((ptr)>>2)]=value; break;
528 if (type.charAt(type.length-1) === '*') type = 'i32'; // pointers are 32-bit
533 case 'i32': return HEAP32[((ptr)>>2)];
609 if (type == 'i64') type = 'i32'; // special case: we have one i32 here, and one i32 late
[all...] |
| /art/compiler/llvm/ |
| intrinsic_func_list.def | [all...] |
| /external/llvm/test/MC/ARM/ |
| simple-fp-encoding.s | 233 vldr.i32 s0, [lr]
396 @ CHECK: vmov.i32 d4, #0x0 @ encoding: [0x10,0x40,0x80,0xf2]
397 @ CHECK: vmov.i32 d4, #0x42000000 @ encoding: [0x12,0x46,0x84,0xf2]
|
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 255 /// i386 the rep register class for i8, i16, and i32 are GR32; while the rep
344 /// turns into 4 EVT::i32 values with both PPC and X86.
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 808 /// promote i16 operations to i32 since i16 instructions are longer.
[all...] |
| TargetLowering.cpp | [all...] |
| SelectionDAGISel.cpp | [all...] |
| /art/test/083-compiler-regressions/src/ |
| Main.java | 314 int i32 = 32; local
[all...] |
| /external/libmtp/src/ |
| ptp.h | 908 int32_t i32; member in union:_PTPPropertyValue
[all...] |
| ptp.c | [all...] |
| /external/llvm/bindings/ocaml/llvm/ |
| llvm.mli | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenDAGPatterns.cpp | 154 /// contradictory (e.g. merge f32 into i32) then this flags an error.
177 // If the RHS has one integer type, upgrade iPTR to i32.
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
