| /dalvik/vm/mterp/armv5te/ |
| OP_MOVE_RESULT.S | 6 ldr r0, [rSELF, #offThread_retval] @ r0<- self->retval.i
8 SET_VREG(r0, r2) @ fp[AA]<- r0
|
| OP_RETURN_WIDE.S | 10 ldmia r2, {r0-r1} @ r0/r1 <- vAA/vAA+1
11 stmia r3, {r0-r1} @ retval<- r0/r1
|
| /external/chromium_org/third_party/angle_dx11/src/libGLESv2/renderer/shaders/compiled/ |
| passthroughps.h | 23 texld r0, t0, s0
24 mov oC0, r0
|
| /external/llvm/test/MC/ARM/ |
| arm_addrmode3.s | 3 @ CHECK: ldrsbt r1, [r0], r2 @ encoding: [0xd2,0x10,0xb0,0xe0]
4 @ CHECK: ldrsbt r1, [r0], #4 @ encoding: [0xd4,0x10,0xf0,0xe0]
5 @ CHECK: ldrsht r1, [r0], r2 @ encoding: [0xf2,0x10,0xb0,0xe0]
6 @ CHECK: ldrsht r1, [r0], #4 @ encoding: [0xf4,0x10,0xf0,0xe0]
7 @ CHECK: ldrht r1, [r0], r2 @ encoding: [0xb2,0x10,0xb0,0xe0]
8 @ CHECK: ldrht r1, [r0], #4 @ encoding: [0xb4,0x10,0xf0,0xe0]
9 @ CHECK: strht r1, [r0], r2 @ encoding: [0xb2,0x10,0xa0,0xe0]
10 @ CHECK: strht r1, [r0], #4 @ encoding: [0xb4,0x10,0xe0,0xe0]
11 ldrsbt r1, [r0], r2
12 ldrsbt r1, [r0], #
[all...] |
| neont2-vld-encoding.s | 5 @ CHECK: vld1.8 {d16}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x07]
6 vld1.8 {d16}, [r0:64]
7 @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x60,0xf9,0x4f,0x07]
8 vld1.16 {d16}, [r0]
9 @ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x60,0xf9,0x8f,0x07]
10 vld1.32 {d16}, [r0]
11 @ CHECK: vld1.64 {d16}, [r0] @ encoding: [0x60,0xf9,0xcf,0x07]
12 vld1.64 {d16}, [r0]
13 @ CHECK: vld1.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x0a]
14 vld1.8 {d16, d17}, [r0:64
[all...] |
| /external/compiler-rt/lib/arm/ |
| extendsfdf2vfp.S | 17 // passed in a GPR and a double precision result is returned in R0/R1 pair.
22 vmov s15, r0 // load float register from R0
24 vmov r0, r1, d7 // return result in r0/r1 pair
|
| fixdfsivfp.S | 22 vmov d7, r0, r1 // load double register from R0/R1
24 vmov r0, s15 // move s15 to result register
|
| fixsfsivfp.S | 22 vmov s15, r0 // load float register from R0
24 vmov r0, s15 // move s15 to result register
|
| fixunsdfsivfp.S | 23 vmov d7, r0, r1 // load double register from R0/R1
25 vmov r0, s15 // move s15 to result register
|
| fixunssfsivfp.S | 23 vmov s15, r0 // load float register from R0
25 vmov r0, s15 // move s15 to result register
|
| floatsidfvfp.S | 22 vmov s15, r0 // move int to float register s15
24 vmov r0, r1, d7 // move d7 to result register pair r0/r1
|
| floatsisfvfp.S | 22 vmov s15, r0 // move int to float register s15
24 vmov r0, s15 // move s15 to result register
|
| floatunssidfvfp.S | 22 vmov s15, r0 // move int to float register s15
24 vmov r0, r1, d7 // move d7 to result register pair r0/r1
|
| floatunssisfvfp.S | 22 vmov s15, r0 // move int to float register s15
24 vmov r0, s15 // move s15 to result register
|
| truncdfsf2vfp.S | 17 // passed in a R0/R1 pair and a signle precision result is returned in R0.
22 vmov d7, r0, r1 // load double from r0/r1 pair
24 vmov r0, s15 // return result in r0
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 17 AND r12,r0,#3
18 BIC r0,r0,#3
26 LDR r4,[r0],r1
27 LDR r5,[r0],r1
29 LDR r8,[r0],r1
31 LDR r9,[r0],r1
36 LDR r5,[r0,#4]
37 LDR r4,[r0],r1
38 LDR r9,[r0,#4
[all...] |
| /bionic/libc/arch-arm/bionic/ |
| _setjmp.S | 50 * Note: r0 is the return value
56 str r1, [r0, #(_JB_MAGIC * 4)]
59 add r1, r0, #(_JB_CORE_BASE * 4)
64 add r1, r0, #(_JB_FLOAT_BASE * 4)
68 str r1, [r0, #(_JB_FLOAT_STATE * 4)]
71 mov r0, #0x00000000
80 ldr r3, [r0, #(_JB_MAGIC * 4)]
86 add r2, r0, #(_JB_FLOAT_BASE * 4)
89 ldr r2, [r0, #(_JB_FLOAT_STATE * 4)]
94 add r2, r0, #(_JB_CORE_BASE * 4
[all...] |
| /bionic/libc/arch-arm/syscalls/ |
| __brk.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
| __fcntl.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
| __fcntl64.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
| __fork.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
| __fstatfs64.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
| __getcpu.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
| __getcwd.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
| __getpriority.S | 11 cmn r0, #(MAX_ERRNO + 1)
13 neg r0, r0
|
