| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/ |
| r600_formats.h | 7 /* list of formats from R700 ISA document - apply across GPUs in different registers */
|
| r600_pipe.c | 250 case R700:
256 rctx->custom_blend_resolve = rctx->chip_class == R700 ? r700_create_resolve_blend(rctx)
869 if (rscreen->chip_class <= R700) {
878 if (rscreen->chip_class <= R700) {
928 rscreen->chip_class = R700;
942 case R700:
|
| r600_asm.c | 43 case R700:
346 case R700:
427 case R700:
448 case R700:
463 case R700:
497 case R700:
540 * R700:
559 case R700:
594 case R700:
695 if (bc->chip_class >= R700) {
[all...] |
| r600.h | 70 R700,
|
| r600_state_common.c | 186 if (rctx->chip_class <= R700 &&
431 if (rctx->chip_class <= R700 && seamless_cube_map != -1 && seamless_cube_map != rctx->seamless_cube_map.enabled) {
645 if (rctx->chip_class <= R700 &&
830 if (rctx->chip_class <= R700) {
[all...] |
| r600_state.c | 927 if (rctx->chip_class >= R700) {
[all...] |
| r600_hw_context.c | 240 /* R600/R700 configuration */
954 if (ctx->chip_class <= R700) {
983 if (ctx->chip_class <= R700) {
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUSubtarget.h | 33 R700,
|
| AMDGPU.td | 73 def FeatureR700 : SubtargetFeatureGeneration<"R700",
|
| R600Defines.h | 152 // R600, R700 Registers
|
| AMDGPUAsmPrinter.cpp | 119 // R600 / R700
|
| R600InstrInfo.h | 121 /// from KCache bank on R700+. This function check if MI set in input meet
|
| /external/mesa3d/src/gallium/drivers/r600/ |
| r600_formats.h | 7 /* list of formats from R700 ISA document - apply across GPUs in different registers */
|
| r600_pipe.c | 250 case R700:
256 rctx->custom_blend_resolve = rctx->chip_class == R700 ? r700_create_resolve_blend(rctx)
869 if (rscreen->chip_class <= R700) {
878 if (rscreen->chip_class <= R700) {
928 rscreen->chip_class = R700;
942 case R700:
|
| r600_asm.c | 43 case R700:
346 case R700:
427 case R700:
448 case R700:
463 case R700:
497 case R700:
540 * R700:
559 case R700:
594 case R700:
695 if (bc->chip_class >= R700) {
[all...] |
| r600.h | 70 R700,
|
| r600_state_common.c | 186 if (rctx->chip_class <= R700 &&
431 if (rctx->chip_class <= R700 && seamless_cube_map != -1 && seamless_cube_map != rctx->seamless_cube_map.enabled) {
645 if (rctx->chip_class <= R700 &&
830 if (rctx->chip_class <= R700) {
[all...] |
| r600_state.c | 927 if (rctx->chip_class >= R700) {
[all...] |
| r600_hw_context.c | 240 /* R600/R700 configuration */
954 if (ctx->chip_class <= R700) {
983 if (ctx->chip_class <= R700) {
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/ |
| r600.h | 60 /* R600/R700 STATES */
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| r600.h | 60 /* R600/R700 STATES */
|
| /external/llvm/test/CodeGen/R600/ |
| fetch-limits.r700+.ll | 14 ; r700+ supports 16 fetches in a clause
|
| /external/llvm/docs/ |
| CompilerWriterInfo.rst | 73 * `AMD R7xx shader ISA <http://developer.amd.com/wordpress/media/2012/10/R700-Family_Instruction_Set_Architecture.pdf>`_
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600Instructions.td | 238 // Common Instructions R600, R700, Evergreen, Cayman
719 // R600 / R700 Instructions
761 // Helper pattern for normalizing inputs to triginomic instructions for R700+
769 // R700 Only instructions
776 // R700 normalizes inputs to SIN/COS the same as EG
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600Instructions.td | 238 // Common Instructions R600, R700, Evergreen, Cayman
719 // R600 / R700 Instructions
761 // Helper pattern for normalizing inputs to triginomic instructions for R700+
769 // R700 Only instructions
776 // R700 normalizes inputs to SIN/COS the same as EG
[all...] |
