/external/llvm/lib/Target/Mips/ |
MicroMipsInstrInfo.td | 3 def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>, 5 def ADDi_MM : MMRel, ArithLogicI<"addi", simm16, GPR32Opnd>, 7 def SLTi_MM : MMRel, SetCC_I<"slti", setlt, simm16, immSExt16, GPR32Opnd>, 9 def SLTiu_MM : MMRel, SetCC_I<"sltiu", setult, simm16, immSExt16, GPR32Opnd>,
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Mips16InstrInfo.td | 24 let MIOperandInfo = (ops CPU16Regs, simm16, CPU16RegsPlusSP); 30 let MIOperandInfo = (ops CPU16RegsPlusSP, simm16); 41 FI816<_func, (outs), (ins simm16:$imm), !strconcat(asmstr, asmstr2), 56 FRI16<op, (outs CPU16Regs:$rx), (ins simm16:$imm), 65 FRI16<op, (outs), (ins CPU16Regs:$rx, simm16:$imm), 74 FRI16<_op, (outs CPU16Regs:$rx), (ins CPU16Regs:$rx_, simm16:$imm), 90 MipsPseudo16<(outs CPU16Regs:$cc), (ins CPU16Regs:$rx, simm16:$imm), 118 FEXT_I816<_func, (outs), (ins simm16:$imm), !strconcat(asmstr, asmstr2), 151 FEXT_RI16<_op, (outs CPU16Regs:$rx), (ins simm16:$imm), 160 FEXT_RI16<_op, (outs ), (ins CPU16Regs:$rx, simm16:$imm) [all...] |
MipsInstrInfo.td | 246 def simm16 : Operand<i32> { 275 let MIOperandInfo = (ops GPR32, simm16); 291 let MIOperandInfo = (ops GPR32, simm16); [all...] |
MipsDSPInstrInfo.td | 398 dag InOperandList = (ins simm16:$shift, ACRegsDSP:$acin); [all...] |
/external/llvm/lib/Target/R600/ |
SIInstrFormats.td | 99 bits <16> SIMM16; 101 let Inst{15-0} = SIMM16; 117 bits <16> SIMM16; 119 let Inst{15-0} = SIMM16;
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SIInstructions.td | [all...] |
/external/valgrind/main/VEX/priv/ |
guest_ppc_toIR.c | 3002 Long simm16 = extend_s_16to64(uimm16); local 4516 Int simm16 = extend_s_16to32(uimm16); local 4773 Int simm16 = extend_s_16to32(uimm16); local 4958 Int simm16 = extend_s_16to32(uimm16); local 5664 ULong simm16 = extend_s_16to64(uimm16); local 6944 Int simm16 = extend_s_16to32(uimm16); local 7082 Int simm16 = extend_s_16to32(uimm16); local 8301 Int simm16 = extend_s_16to32(uimm16); local [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
SIInstrInfo.td | 326 bits <16> SIMM16; 328 let Inst{15-0} = SIMM16; 341 bits <16> SIMM16; 343 let Inst{15-0} = SIMM16;
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SIInstructions.td | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZOperands.td | 166 def SIMM16 : SDNodeXForm<imm, [{ 260 }], SIMM16, "S16Imm">; 266 def imm32sx16trunc : Immediate<i32, [{}], SIMM16, "S16Imm">; 343 }], SIMM16, "S16Imm">;
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/external/mesa3d/src/gallium/drivers/radeon/ |
SIInstrInfo.td | 326 bits <16> SIMM16; 328 let Inst{15-0} = SIMM16; 341 bits <16> SIMM16; 343 let Inst{15-0} = SIMM16;
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SIInstructions.td | [all...] |