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  /external/qemu/target-mips/
op_helper.c 703 int32_t tcstatus; local
706 tcstatus = env->active_tc.CP0_TCStatus;
708 tcstatus = env->tcs[other_tc].CP0_TCStatus;
710 return (env->CP0_EntryHi & ~0xff) | (tcstatus & 0xff);
717 int32_t tcstatus; local
720 tcstatus = env->active_tc.CP0_TCStatus;
722 tcstatus = env->tcs[other_tc].CP0_TCStatus;
725 t0 |= tcstatus & (0xf << CP0TCSt_TCU0);
726 t0 |= (tcstatus & (1 << CP0TCSt_TMX)) >> (CP0TCSt_TMX - CP0St_MX);
727 t0 |= (tcstatus & (0x3 << CP0TCSt_TKSU)) >> (CP0TCSt_TKSU - CP0St_KSU)
759 int32_t tcstatus; local
1137 int32_t tcstatus; local
1181 int32_t tcstatus = env->tcs[other_tc].CP0_TCStatus; local
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translate.c     [all...]
  /external/kernel-headers/original/asm-mips/
mipsmtregs.h 127 /* TCStatus fields (per TC) */
153 /* TCStatus TCU bits can use same definitions/offsets as CU bits in Status */

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