Lines Matching full:instruction
27 inline int8_t Instruction::VRegA_10t() const {
32 inline uint8_t Instruction::VRegA_10x() const {
37 inline uint4_t Instruction::VRegA_11n() const {
42 inline uint8_t Instruction::VRegA_11x() const {
47 inline uint4_t Instruction::VRegA_12x() const {
52 inline int16_t Instruction::VRegA_20t() const {
57 inline uint8_t Instruction::VRegA_21c() const {
62 inline uint8_t Instruction::VRegA_21h() const {
67 inline uint8_t Instruction::VRegA_21s() const {
72 inline uint8_t Instruction::VRegA_21t() const {
77 inline uint8_t Instruction::VRegA_22b() const {
82 inline uint4_t Instruction::VRegA_22c() const {
87 inline uint4_t Instruction::VRegA_22s() const {
92 inline uint4_t Instruction::VRegA_22t() const {
97 inline uint8_t Instruction::VRegA_22x() const {
102 inline uint8_t Instruction::VRegA_23x() const {
107 inline int32_t Instruction::VRegA_30t() const {
112 inline uint8_t Instruction::VRegA_31c() const {
117 inline uint8_t Instruction::VRegA_31i() const {
122 inline uint8_t Instruction::VRegA_31t() const {
127 inline uint16_t Instruction::VRegA_32x() const {
132 inline uint4_t Instruction::VRegA_35c() const {
137 inline uint8_t Instruction::VRegA_3rc() const {
142 inline uint8_t Instruction::VRegA_51l() const {
150 inline int4_t Instruction::VRegB_11n() const {
155 inline uint4_t Instruction::VRegB_12x() const {
160 inline uint16_t Instruction::VRegB_21c() const {
165 inline uint16_t Instruction::VRegB_21h() const {
170 inline int16_t Instruction::VRegB_21s() const {
175 inline int16_t Instruction::VRegB_21t() const {
180 inline uint8_t Instruction::VRegB_22b() const {
185 inline uint4_t Instruction::VRegB_22c() const {
190 inline uint4_t Instruction::VRegB_22s() const {
195 inline uint4_t Instruction::VRegB_22t() const {
200 inline uint16_t Instruction::VRegB_22x() const {
205 inline uint8_t Instruction::VRegB_23x() const {
210 inline uint32_t Instruction::VRegB_31c() const {
215 inline int32_t Instruction::VRegB_31i() const {
220 inline int32_t Instruction::VRegB_31t() const {
225 inline uint16_t Instruction::VRegB_32x() const {
230 inline uint16_t Instruction::VRegB_35c() const {
235 inline uint16_t Instruction::VRegB_3rc() const {
240 inline uint64_t Instruction::VRegB_51l() const {
249 inline int8_t Instruction::VRegC_22b() const {
254 inline uint16_t Instruction::VRegC_22c() const {
259 inline int16_t Instruction::VRegC_22s() const {
264 inline int16_t Instruction::VRegC_22t() const {
269 inline uint8_t Instruction::VRegC_23x() const {
274 inline uint4_t Instruction::VRegC_35c() const {
279 inline uint16_t Instruction::VRegC_3rc() const {
284 inline void Instruction::GetArgs(uint32_t arg[5]) const {
