Lines Matching refs:val
475 #define write_r10k_perf_cntr(counter,val) do { __asm__ __volatile__( "mtpc\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
477 #define write_r10k_perf_cntl(counter,val) do { __asm__ __volatile__( "mtps\t%0, %1" : : "r" (val), "i" (counter)); } while (0)
485 #define __write_ulong_c0_register(reg, sel, val) do { if (sizeof(unsigned long) == 4) __write_32bit_c0_register(reg, sel, val); else __write_64bit_c0_register(reg, sel, val); } while (0)
490 #define __write_64bit_c0_split(source, sel, val) do { unsigned long __flags; local_irq_save(__flags); if (sel == 0) __asm__ __volatile__( ".set\tmips64\n\t" "dsll\t%L0, %L0, 32\n\t" "dsrl\t%L0, %L0, 32\n\t" "dsll\t%M0, %M0, 32\n\t" "or\t%L0, %L0, %M0\n\t" "dmtc0\t%L0, " #source "\n\t" ".set\tmips0" : : "r" (val)); else __asm__ __volatile__( ".set\tmips64\n\t" "dsll\t%L0, %L0, 32\n\t" "dsrl\t%L0, %L0, 32\n\t" "dsll\t%M0, %M0, 32\n\t" "or\t%L0, %L0, %M0\n\t" "dmtc0\t%L0, " #source ", " #sel "\n\t" ".set\tmips0" : : "r" (val)); local_irq_restore(__flags); } while (0)
492 #define write_c0_index(val) __write_32bit_c0_register($0, 0, val)
495 #define write_c0_random(val) __write_32bit_c0_register($1, 0, val)
497 #define write_c0_entrylo0(val) __write_ulong_c0_register($2, 0, val)
500 #define write_c0_entrylo1(val) __write_ulong_c0_register($3, 0, val)
502 #define write_c0_conf(val) __write_32bit_c0_register($3, 0, val)
505 #define write_c0_context(val) __write_ulong_c0_register($4, 0, val)
507 #define write_c0_userlocal(val) __write_ulong_c0_register($4, 2, val)
510 #define write_c0_pagemask(val) __write_32bit_c0_register($5, 0, val)
512 #define write_c0_wired(val) __write_32bit_c0_register($6, 0, val)
516 #define write_c0_cache(val) __write_32bit_c0_register($7, 0, val)
519 #define write_c0_badvaddr(val) __write_ulong_c0_register($8, 0, val)
521 #define write_c0_count(val) __write_32bit_c0_register($9, 0, val)
524 #define write_c0_count2(val) __write_32bit_c0_register($9, 6, val)
526 #define write_c0_count3(val) __write_32bit_c0_register($9, 7, val)
529 #define write_c0_entryhi(val) __write_ulong_c0_register($10, 0, val)
531 #define write_c0_compare(val) __write_32bit_c0_register($11, 0, val)
534 #define write_c0_compare2(val) __write_32bit_c0_register($11, 6, val)
536 #define write_c0_compare3(val) __write_32bit_c0_register($11, 7, val)
539 #define write_c0_status(val) __write_32bit_c0_register($12, 0, val)
541 #define write_c0_cause(val) __write_32bit_c0_register($13, 0, val)
544 #define write_c0_epc(val) __write_ulong_c0_register($14, 0, val)
556 #define write_c0_config(val) __write_32bit_c0_register($16, 0, val)
557 #define write_c0_config1(val) __write_32bit_c0_register($16, 1, val)
559 #define write_c0_config2(val) __write_32bit_c0_register($16, 2, val)
560 #define write_c0_config3(val) __write_32bit_c0_register($16, 3, val)
561 #define write_c0_config4(val) __write_32bit_c0_register($16, 4, val)
562 #define write_c0_config5(val) __write_32bit_c0_register($16, 5, val)
564 #define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
565 #define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
576 #define write_c0_watchlo0(val) __write_ulong_c0_register($18, 0, val)
577 #define write_c0_watchlo1(val) __write_ulong_c0_register($18, 1, val)
579 #define write_c0_watchlo2(val) __write_ulong_c0_register($18, 2, val)
580 #define write_c0_watchlo3(val) __write_ulong_c0_register($18, 3, val)
581 #define write_c0_watchlo4(val) __write_ulong_c0_register($18, 4, val)
582 #define write_c0_watchlo5(val) __write_ulong_c0_register($18, 5, val)
584 #define write_c0_watchlo6(val) __write_ulong_c0_register($18, 6, val)
585 #define write_c0_watchlo7(val) __write_ulong_c0_register($18, 7, val)
596 #define write_c0_watchhi0(val) __write_32bit_c0_register($19, 0, val)
597 #define write_c0_watchhi1(val) __write_32bit_c0_register($19, 1, val)
599 #define write_c0_watchhi2(val) __write_32bit_c0_register($19, 2, val)
600 #define write_c0_watchhi3(val) __write_32bit_c0_register($19, 3, val)
601 #define write_c0_watchhi4(val) __write_32bit_c0_register($19, 4, val)
602 #define write_c0_watchhi5(val) __write_32bit_c0_register($19, 5, val)
604 #define write_c0_watchhi6(val) __write_32bit_c0_register($19, 6, val)
605 #define write_c0_watchhi7(val) __write_32bit_c0_register($19, 7, val)
607 #define write_c0_xcontext(val) __write_ulong_c0_register($20, 0, val)
610 #define write_c0_intcontrol(val) __write_32bit_c0_ctrl_register($20, val)
612 #define write_c0_framemask(val) __write_32bit_c0_register($21, 0, val)
615 #define write_c0_perfcontrol(val) __write_32bit_c0_register($22, 0, val)
617 #define write_c0_diag(val) __write_32bit_c0_register($22, 0, val)
620 #define write_c0_diag1(val) __write_32bit_c0_register($22, 1, val)
622 #define write_c0_diag2(val) __write_32bit_c0_register($22, 2, val)
625 #define write_c0_diag3(val) __write_32bit_c0_register($22, 3, val)
627 #define write_c0_diag4(val) __write_32bit_c0_register($22, 4, val)
630 #define write_c0_diag5(valval)
632 #define write_c0_debug(val) __write_32bit_c0_register($23, 0, val)
635 #define write_c0_depc(val) __write_ulong_c0_register($24, 0, val)
637 #define write_c0_perfctrl0(val) __write_32bit_c0_register($25, 0, val)
640 #define write_c0_perfcntr0(val) __write_32bit_c0_register($25, 1, val)
642 #define write_c0_perfctrl1(val) __write_32bit_c0_register($25, 2, val)
645 #define write_c0_perfcntr1(val) __write_32bit_c0_register($25, 3, val)
647 #define write_c0_perfctrl2(val) __write_32bit_c0_register($25, 4, val)
650 #define write_c0_perfcntr2(val) __write_32bit_c0_register($25, 5, val)
652 #define write_c0_perfctrl3(val) __write_32bit_c0_register($25, 6, val)
655 #define write_c0_perfcntr3(val) __write_32bit_c0_register($25, 7, val)
657 #define write_c0_perfcount(val) __write_64bit_c0_register($25, 0, val)
660 #define write_c0_ecc(val) __write_32bit_c0_register($26, 0, val)
662 #define write_c0_derraddr0(val) __write_ulong_c0_register($26, 1, val)
666 #define write_c0_derraddr1(val) __write_ulong_c0_register($27, 1, val)
669 #define write_c0_taglo(val) __write_32bit_c0_register($28, 0, val)
671 #define write_c0_dtaglo(val) __write_32bit_c0_register($28, 2, val)
674 #define write_c0_taghi(val) __write_32bit_c0_register($29, 0, val)
676 #define write_c0_errorepc(val) __write_ulong_c0_register($30, 0, val)
679 #define write_c0_hwrena(val) __write_32bit_c0_register($7, 0, val)
681 #define write_c0_intctl(val) __write_32bit_c0_register($12, 1, val)
684 #define write_c0_srsctl(val) __write_32bit_c0_register($12, 2, val)
686 #define write_c0_srsmap(val) __write_32bit_c0_register($12, 3, val)
689 #define write_c0_ebase(val) __write_32bit_c0_register($15, 1, val)
692 #define wrdsp(val, mask) do { __asm__ __volatile__( " .set push \n" " .set noat \n" " move $1, %0 \n" " # wrdsp $1, %x1 \n" " .word 0x7c2004f8 | (%x1 << 11) \n" " .set pop \n" : : "r" (val), "i" (mask)); } while (0)
